公开(公告)号：US20220375964A1

公开(公告)日：2022-11-24

申请号：US17815847

申请日：2022-07-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Jhon-Jhy LIAW

IPC分类号： H01L27/118 ,  H01L27/092 ,  H01L27/11 ,  H01L29/165 ,  H01L29/167 ,  H01L29/16 ,  H01L29/267 ,  H01L29/10 ,  H01L29/78 ,  H01L29/24

摘要： An IC is provided. The IC includes a first P-type FinFET and a second P-type FinFET. The first P-type FinFET includes a silicon germanium channel region. The second P-type FinFET includes a Si channel region. First source/drain regions of the first P-type FinFET are formed on a discontinuous semiconductor fin, and second source/drain regions of the second P-type FinFET are formed on a continuous semiconductor fin. A first depth of the first source/drain regions is different from a second depth of the second source/drain regions.

公开(公告)号：US11502175B2

公开(公告)日：2022-11-15

申请号：US16905870

申请日：2020-06-18

申请人： RFHIC Corporation

发明人： Won Sang Lee

IPC分类号： H01L21/02 ,  H01L29/20 ,  H01L21/768 ,  H01L29/205 ,  H01L29/267 ,  H01L29/66 ,  H01L29/16 ,  H01L23/00

摘要： Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a diamond layer are sequentially deposited on the III-Nitride layer. Next, a substrate wafer that includes a glass substrate (or a silicon substrate covered by a protection layer) is glass bonded to the diamond layer. Then, the silicon carrier wafer and the protection layer are removed.

公开(公告)号：US11502170B2

公开(公告)日：2022-11-15

申请号：US16768090

申请日：2020-03-23

申请人： INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.

发明人： King Yuen Wong ,  Ronghui Denys Hao

IPC分类号： H01L29/08 ,  H01L27/088 ,  H01L29/40 ,  H01L29/66 ,  H01L29/20 ,  H01L29/205 ,  H01L29/267

摘要： Some embodiments of the present disclosure provide a semiconductor device, including a substrate, a channel layer, a barrier layer, a p-type doped III-V layer, a source, a drain and a doped semiconductor layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The p-type doped III-V layer is disposed on the barrier layer. A gate is disposed on the p-type doped III-V layer. The source and the drain are arranged on two opposite sides of the gate. The doped semiconductor layer is provided with a first side close to the gate and a second side away from the gate. The drain covers the first side of the doped semiconductor layer.

公开(公告)号：US20220344499A1

公开(公告)日：2022-10-27

申请号：US17861913

申请日：2022-07-11

申请人： Infineon Technologies Austria AG

发明人： Seong-Eun Park ,  Jianwei Wan ,  Mihir Tungare ,  Peter Kim ,  Srinivasan Kannan

IPC分类号： H01L29/778 ,  H01L21/02 ,  H01L29/267

摘要： A method includes providing a type IV semiconductor substrate having a main surface, forming a type III-V semiconductor channel region over the type IV semiconductor substrate, the type III-V semiconductor channel region comprising a two-dimensional carrier gas, forming a type III-V semiconductor lattice transition region between the type IV semiconductor substrate and the type III-V semiconductor channel region, wherein forming the type III-V semiconductor lattice transition region incudes forming a first lattice transition layer over the type IV semiconductor substrate, the first lattice transition layer having a first metallic concentration, forming a third lattice transition layer over the first lattice transition layer, the third lattice transition layer having a third metallic concentration higher than the first metallic concentration, and forming a fourth lattice transition layer over the third lattice transition layer, the fourth lattice transition layer having a fourth metallic lower than the first metallic concentration.

公开(公告)号：US11476335B2

公开(公告)日：2022-10-18

申请号：US16914474

申请日：2020-06-29

申请人： RFHIC Corporation

发明人： Won Sang Lee

IPC分类号： H01L21/02 ,  H01L29/20 ,  H01L21/768 ,  H01L29/205 ,  H01L29/267 ,  H01L29/66 ,  H01L29/16 ,  H01L23/00

摘要： Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a diamond layer are sequentially deposited on the III-Nitride layer. Next, a support wafer that includes a GaN layer (or a silicon layer covered by a protection layer) is deposited on the diamond layer. Then, the silicon carrier wafer and the protection layer are removed.

公开(公告)号：US20220285224A1

公开(公告)日：2022-09-08

申请号：US17752080

申请日：2022-05-24

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Ming-Heng TSAI ,  Chun-Sheng LIANG ,  Pei-Lin WU ,  Yi-Ren CHEN ,  Shih-Hsun CHANG

IPC分类号： H01L21/8238 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/16 ,  H01L29/24 ,  H01L29/267 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a spacer over a side of the gate stack. The semiconductor device structure includes a dielectric layer over the substrate. The dielectric layer has a first recess, the dielectric layer has an upper portion and a first lower portion, the upper portion is over the first recess, the first recess is between the first lower portion and the spacer, and the upper portion has a convex curved sidewall.

公开(公告)号：US20220262954A1

公开(公告)日：2022-08-18

申请号：US17734960

申请日：2022-05-02

申请人： Kioxia Corporation

发明人： Tomoki ISHIMARU ,  Shinji MORI ,  Kazuhiro MATSUO ,  Keiichi SAWA ,  Akifumi GAWASE

IPC分类号： H01L29/786 ,  H01L27/108 ,  H01L29/267 ,  H01L29/08 ,  H01L29/417 ,  H01L29/40

摘要： A semiconductor device of an embodiment includes a first electrode, a second electrode, a first metallic region provided between the first electrode and the second electrode and includes at least one metallic element selected from the group consisting of indium (In), gallium (Ga), zinc (Zn), aluminum (Al), magnesium (Mg), manganese (Mn), titanium (Ti), tungsten (W), molybdenum (Mo), and tin (Sn), a second metallic region provided between the first metallic region and the second electrode and includes the at least one metallic element, a semiconductor region provided between the first metallic region and the second metallic region and includes the at least one metallic element and oxygen (O), an insulating region provided between the first metallic region and the second metallic region and is surrounded by the semiconductor region, a gate electrode surrounding the semiconductor region, and a gate insulating layer provided between the semiconductor region and the gate electrode.

公开(公告)号：US20220223738A1

公开(公告)日：2022-07-14

申请号：US17712002

申请日：2022-04-01

申请人： LG Display Co., Ltd.

发明人： Ju-Heyuck BAECK

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L21/385 ,  H01L21/44 ,  H01L27/12 ,  H01L29/267 ,  H01L29/66

摘要： A thin film transistor includes a gate electrode, an active layer formed of oxide semiconductor material on a substrate, and a gate insulation layer therebetween. The active layer includes a channel region corresponding to the gate electrode, a source region at one side of the channel region, and a drain region at the other side of the channel region. The source region includes a first upper portion and the drain region includes a second upper portion that includes the oxide semiconductor material and Si.

公开(公告)号：US11362024B2

公开(公告)日：2022-06-14

申请号：US16425369

申请日：2019-05-29

申请人： SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.

发明人： Hisashi Shimura ,  Yoshiyasu Kuwabara

IPC分类号： H01L23/495 ,  H01L29/267 ,  H01L29/78 ,  H01L21/56 ,  H01L23/31

摘要： A semiconductor device includes a semiconductor chip in which a field effect transistor mainly containing GaN is formed on a surface of a SiC semiconductor substrate. The semiconductor device includes a metal base on which a back surface of the semiconductor chip is mounted through a conductive adhesive material containing Ag and a resin mold configured to seal the semiconductor chip. A metal having wettability lower than wettability of Au or Cu with respect to Ag is exposed in a region extending along an edge of the back surface.

公开(公告)号：US20220181450A1

公开(公告)日：2022-06-09

申请号：US17678975

申请日：2022-02-23

申请人： RFHIC Corporation

发明人： Won Sang Lee

IPC分类号： H01L29/20 ,  H01L21/02 ,  H01L21/768 ,  H01L29/205 ,  H01L29/267 ,  H01L29/66 ,  H01L29/16 ,  H01L23/00

摘要： Wafers including a diamond layer and a semiconductor layer having III-Nitride compounds and methods for fabricating the wafers are provided. A nucleation layer, at least one semiconductor layer having III-Nitride compound and a protection layer are formed on a silicon substrate. Then, a silicon carrier wafer is glass bonded to the protection layer. Subsequently the silicon substrate, nucleation layer and a portion of the semiconductor layer are removed. Then, an intermediate layer, a seed layer and a diamond layer are sequentially deposited on the III-Nitride layer. Next, a support wafer that includes a GaN layer (or a silicon layer covered by a protection layer) is deposited on the diamond layer. Then, the silicon carrier wafer and the protection layer are removed.