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    OUTPUT MATCHING NETWORK TO REDUCE SELF AND MUTUAL INDUCTANCES OF OUTPUT INDUCTIVE COMPONENTS IN A CAVITY PACKAGE
    2.
    发明申请
    OUTPUT MATCHING NETWORK TO REDUCE SELF AND MUTUAL INDUCTANCES OF OUTPUT INDUCTIVE COMPONENTS IN A CAVITY PACKAGE 有权

    公开(公告)号：US20250006688A1

    公开(公告)日：2025-01-02

    申请号：US18214530

    申请日：2023-06-27

    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.

    Inventor： Seiya TAKASHIMA

    IPC: H01L23/00 ,  H01L25/16

    Abstract: A semiconductor device includes a cavity package including a substrate and at least one output lead disposed higher than the substrate, in a side view, to create a cavity. A transistor die is disposed within the cavity. A top surface of the transistor die is lower than a top surface of the output lead when viewed in the side view. A first substrate is disposed within the cavity and is separate from the transistor die. A top surface of the first substrate is lower than the top surface of the output lead in the side view. A shunt wire connects an output of the transistor die to the first substrate, and an output wire connects the output of the transistor substrate to the output lead. The shunt wire or the output wire is disposed and shaped to minimize self-inductance and to minimize mutual inductance with the shunt wire.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20250006595A1

    公开(公告)日：2025-01-02

    申请号：US18746698

    申请日：2024-06-18

    Applicant: Sumitomo Electric Device Innovations, Inc.

    Inventor： Yuya TSUTSUMI

    IPC: H01L23/482 ,  H01L27/088 ,  H01L29/417 ,  H01L29/423

    Abstract: A semiconductor device includes a substrate, a first unit FET including first source, first drain, and first gate electrodes, a second unit FET including second source, second drain, and second gate electrodes, a first source wiring electrically contacting the first source electrode, a gate bus bar electrically connected to the first gate electrode, and interposing the first gate electrode between the gate bus bar and the second gate electrode, and a gate wiring provided above the first source electrode in non-contact with the first source electrode, and electrically connecting the gate bus bar and the second gate electrode, wherein a maximum width in a first direction of a region where the first source wiring contacts the first source electrode is ½ times or more a maximum width in the first direction of a region where the first source wiring overlaps the first source electrode.

    OPTICAL TRANSMITTER
    6.
    发明公开
    OPTICAL TRANSMITTER 审中-公开

    公开(公告)号：US20230379060A1

    公开(公告)日：2023-11-23

    申请号：US17913736

    申请日：2021-03-26

    Applicant: Sumitomo Electric Device Innovations, Inc.

    Inventor： Ryutaro TAKEI ,  Takayuki SUZUKI

    IPC: H04B10/50 ,  H04B10/516

    CPC classification number: H04B10/503 ,  H04B10/516

    Abstract: An optical transmitter includes an optical transmission unit, a drive unit, an arithmetic circuit, and a bias supply circuit. The optical transmission unit includes a laser element. The drive unit drives the laser element according to a first transmission signal. The arithmetic circuit generates a second transmission signal. The bias supply circuit superimposes the second transmission signal on a bias current of the laser element. An output of the arithmetic circuit containing the second transmission signal is a digital signal in a rectangular wave form based on a reference clock having a frequency lower than a reference clock frequency of the first transmission signal. The bias supply circuit includes a circuit element for inclining a rising portion and a falling portion of the output of the arithmetic circuit.

    Semiconductor light receiving element with mesa type photodiode structure
    8.
    发明授权
    Semiconductor light receiving element with mesa type photodiode structure 有权

    公开(公告)号：US11757052B2

    公开(公告)日：2023-09-12

    申请号：US17188335

    申请日：2021-03-01

    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.

    Inventor： Yoshihiro Yoneda ,  Koji Ebihara ,  Takuya Okimoto

    IPC: H01L31/0232 ,  H01L31/0304 ,  H01L31/0352 ,  H01L31/109

    CPC classification number: H01L31/02327 ,  H01L31/03046 ,  H01L31/035281 ,  H01L31/109

    Abstract: A semiconductor light receiving element includes a first semiconductor layer, a waveguide type photodiode structure, an optical waveguide structure, and a fourth semiconductor layer. The waveguide type photodiode structure is provided on the first semiconductor layer. The waveguide type photodiode structure includes an optical absorption layer, a second semiconductor layer, a multiplication layer, and a third semiconductor layer. The optical waveguide structure is provided on the first semiconductor layer. The optical waveguide structure includes an optical waveguiding core layer and a cladding layer. An end face of the waveguide type photodiode structure faces to an end face of the optical waveguide structure. The fourth semiconductor layer is located between the end face of the waveguide type photodiode structure and the end face of the optical waveguide structure. The fourth semiconductor layer contacts the multiplication layer at the end face of the waveguide type photodiode structure.

    CAPACITOR AND METHOD OF MANUFACTURING SAME
    9.
    发明公开
    CAPACITOR AND METHOD OF MANUFACTURING SAME 审中-公开

    公开(公告)号：US20230282686A1

    公开(公告)日：2023-09-07

    申请号：US18108924

    申请日：2023-02-13

    Applicant: Sumitomo Electric Device Innovations, Inc.

    Inventor： Yasuyo YOTSUDA

    IPC: H01L21/302

    CPC classification number: H01L28/56 ,  H01L28/75 ,  H01L21/302

    Abstract: A capacitor includes a substrate, a first electrode provided on the substrate, a dielectric film provided on the first electrode, a second electrode provided on the dielectric film and having an outer periphery positioned inside the outer periphery of the first electrode in a plan view viewed from above in a direction normal to an upper surface of the substrate, a third electrode that is in contact with the second electrode in a region inside the second electrode in the plan view, is separated upward from the first electrode and the dielectric film outside the region in the plan view, and has an outer periphery positioned inside the outer periphery of the first electrode and an outer periphery of the dielectric film in the plan view, and a protective film covering the second electrode and the third electrode and being in contact with the second electrode and the third electrode.

    OPTICAL TRANSCEIVER
    10.
    发明公开
    OPTICAL TRANSCEIVER 审中-公开

    公开(公告)号：US20230213047A1

    公开(公告)日：2023-07-06

    申请号：US18089662

    申请日：2022-12-28

    Applicant: Sumitomo Electric Device Innovations, Inc.

    Inventor： Masato HINO

    IPC: F16B1/00 ,  G02B6/42

    CPC classification number: F16B1/00 ,  G02B6/4278

    Abstract: An optical transceiver includes an outer part provided outside the apparatus upon an engagement of the optical transceiver with the apparatus. The outer part includes a first spindle, a rotational member, a sliding member. The rotational member is configured to rotate on the first spindle. The sliding member is configured to move along the first direction. The rotational member has a hole. The sliding member has a second spindle. The first spindle and the second spindle are fit with the hole. The optical transceiver includes an inner part provided inside the apparatus upon the engagement with the apparatus. The hole has a first circular area, a second circular area, and a straight area. The first spindle is fit with the first circular area. The second spindle is fit with the second circular area. The straight area is connected between the first circular area and the second circular area.

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