公开(公告)号：US20200333850A1

公开(公告)日：2020-10-22

申请号：US16849485

申请日：2020-04-15

Applicant: ASUSTEK COMPUTER INC.

Inventor： Chieh MII ,  Ming-Chih HUANG ,  Tong-Shen HSIUNG ,  Meng-Chu HUANG ,  Fu-Yu CAI ,  Shang-Chih LIANG ,  Chia-Hao HUNG ,  Li-Wei YU ,  Chi Cheng LIAO ,  Hsin-I LU ,  Cheng-Yu LIN

IPC: G06F1/16 ,  F21V3/02 ,  F21S4/20

Abstract: An electronic device including a luminous strip is provided, including a housing, a first light guiding strip, a second light guiding strip, a light-transmissive structure, a first light-emitting element, a second light-emitting element and a third light-emitting element. The housing includes a first side wall and a second side wall, where a corner area exists between the first side wall and the second side wall. The first light guiding strip is disposed on the first side wall. The second light guiding strip is disposed on the second side wall. The light-transmissive structure is disposed in the corner area, and connected to the first light guiding strip and the second light guiding strip. The first light-emitting element is disposed at a first end of the first light guiding strip. The second light-emitting element is disposed at a second end of the second light guiding strip. The third light-emitting element is disposed between the first light-emitting element and the second light-emitting element, and spaced apart from the light-transmissive structure by a preset distance, to emit light on the light-transmissive structure. A three-dimensional light effect is presented on the electronic device at low costs by using only a small number of elements, to improve the product appearance.

公开(公告)号：US20200329513A1

公开(公告)日：2020-10-15

申请号：US16844434

申请日：2020-04-09

Applicant: ASUSTek Computer Inc.

Inventor： Li-Te Pan ,  Richard Lee-Chee Kuo

IPC: H04W76/11

Abstract: A method and device are disclosed from the perspective of a first UE (User Equipment) for changing sidelink identity for a sidelink unicast link associated with a second UE. In one method, the method includes the first UE establishing the sidelink unicast link with the second UE, wherein a first lower-layer identity of the first UE and a second lower-layer identity of the second UE are used for communicating between the first UE and the second UE via the sidelink unicast link. The method also includes the first UE transmitting a Link Identifier Update Request message to the second UE, wherein the Link Identifier Update Request message includes a new first lower-layer identity of the first UE or information for deriving the new first lower-layer identity. The method further includes the first UE receiving a Link Identifier Update Response message from the second UE. In addition, the method includes the first UE continuing to use the first lower-layer identity for receiving sidelink data from the second UE until a sidelink data frame with the new first lower-layer identity is received from the second UE.

公开(公告)号：US10804713B2

公开(公告)日：2020-10-13

申请号：US15838680

申请日：2017-12-12

Applicant: ASUSTeK COMPUTER INC.

Inventor： Feng-Chi Shen ,  Tsung-Han Wu ,  Chien-Chung Lo ,  Yii-Lin Wu

IPC: H02J7/00 ,  H02J7/34

Abstract: A charge-discharge device and a control method of the charge-discharge device are provided. The control method of the charge-discharge device comprising: receiving an input voltage signal via a configuration channel of a USB port; sampling the input voltage signal in a predetermined period to generate a plurality of sampling values; selectively connecting the configuration channel to a pull-down circuit or a pull-up circuit according to the sampling values, receiving a first charging voltage via a power channel of the USB port when the configuration channel is connected to the pull-down circuit, and outputting a second charging voltage via the power channel when the configuration channel is connected to the pull-up circuit.

公开(公告)号：US20200322023A1

公开(公告)日：2020-10-08

申请号：US16821435

申请日：2020-03-17

Applicant: ASUSTek Computer Inc.

Inventor： Yi-Hsuan Kung ,  Yu-Hsuan Guo

IPC: H04B7/06 ,  H04B7/08

Abstract: A method and apparatus are disclosed. In an example from the perspective of a User Equipment (UE), the UE determines whether a beam associated with a reference signal of a cell has an In-Device Coexistence (IDC) problem. The UE determines whether to include information associated with the reference signal in a report based on whether the beam associated with the reference signal has the IDC problem. The UE transmits the report to a network node.

公开(公告)号：US20200300269A1

公开(公告)日：2020-09-24

申请号：US16896353

申请日：2020-06-09

Applicant: ASUSTeK COMPUTER INC.

Inventor： Hsin-Chen LIN ,  Ing-Jer CHIOU

IPC: F04D29/66 ,  F04D29/28 ,  F04D29/30

Abstract: A centrifugal fan includes a housing and an impeller. The housing includes a sidewall, and the sidewall includes a tongue portion. The impeller includes a fan hub and a plurality of blades. The fan hub is rotatably disposed in the housing, and the tongue portion has an inner contour line on a reference plane. The blades connect to the fan hub. Each one of the blades has an end surface facing the sidewall. The end surface has an outer contour line on the section of the blade. Any two adjacent blades have different outer contour lines. The outer contour line of at least one first blade of the plurality of blades is parallel to the inner contour line. The outer contour line of at least one second blade of the plurality of blades is not parallel to the inner contour line.

公开(公告)号：US20200285277A1

公开(公告)日：2020-09-10

申请号：US16811069

申请日：2020-03-06

Applicant: ASUSTeK COMPUTER INC.

Inventor： Chui-Hung CHEN ,  Cheng-Han CHUNG ,  Ching-Yuan YANG ,  Chia-Min CHENG

IPC: G06F1/16 ,  H04M1/02

Abstract: A motor assembly is provided. The motor assembly includes a motor, a driving force transmission module, and a driving force output component. The motor includes a rotating shaft, the rotating shaft is configured to rotate along a first axis. The driving force transmission module includes a first transmission portion and a second transmission portion connected with each other. The first transmission portion is connected with the rotating shaft of the motor, and the second transmission portion is bent relative to the first transmission portion and extends to one side of the motor. The driving force output component is connected with an end of the second transmission portion away from the first transmission portion, and configured to rotate along a second axis, which is parallel to the first axis.

公开(公告)号：US20200275365A1

公开(公告)日：2020-08-27

申请号：US16790806

申请日：2020-02-14

Applicant: ASUSTeK COMPUTER INC.

Inventor： Kun-Hsin CHIANG

IPC: H04W52/02

Abstract: A controlling method for an electronic device is provided, including the following steps: receiving a feedback signal; determining a signal strength value of the feedback signal; obtaining a first threshold value and a second threshold value; comparing the signal strength value with the first threshold value and the second threshold value, where the first threshold value is less than the second threshold value; controlling a screen to operate in a first mode when the signal strength value is greater than the second threshold value; comparing the signal strength value with a predetermined value when the signal strength value is greater than the first threshold value but not greater than the second threshold value, and adjusting the first threshold value to be the signal strength value when the signal strength value is greater than the predetermined value.

公开(公告)号：US20200272411A1

公开(公告)日：2020-08-27

申请号：US16792927

申请日：2020-02-18

Applicant: ASUSTeK COMPUTER INC.

Inventor： Yen-Ling CHEN ,  Pu-Chien LEE ,  Jen-Pang HSU ,  Chao-Hsien HUANG ,  Chih-Hsien YANG

IPC: G06F3/16 ,  G10L25/51 ,  H04R29/00

Abstract: A volume of sound adjustment method includes the following steps: outputting an audio with a played volume; detecting a volume of environmental noise; comparing the volume of environmental noise with a setting volume, and setting the lower one as a first target volume and setting the higher one as a second target volume; and gradually adjusting the played volume from the first target volume to the second target volume at an adjusting speed. In addition, an electronic device for adjusting a volume and a non-transitory computer readable storage medium device are also disclosed.

公开(公告)号：US10756626B2

公开(公告)日：2020-08-25

申请号：US16114331

申请日：2018-08-28

Applicant: ASUSTeK COMPUTER INC.

Inventor： Wei-Bo Hu ,  Zhao-Long Dong ,  Ching-Ji Liang

IPC: H02M3/158 ,  H02M1/32 ,  H02M1/38 ,  G05F1/10 ,  H02M3/335 ,  H02M1/08 ,  H02M1/00

Abstract: A power conversion circuit includes a voltage regulator circuit and a detection circuit. The voltage regulator circuit includes a first switch and a second switch. A first end of the first switch receives an input voltage, and a control end of the first switch receives a first drive signal. The second switch is coupled between a second end of the first switch and the ground, and is turned on or off based on a second drive signal. The first switch and the second switch regulate the input voltage to output an output voltage. The detection circuit is configured to determine whether the first switch is short-circuited or not based on a voltage level of at least one of the first end, the second end, or the control end of the first switch, and adjust the second drive signal when the first switch is short-circuited, to turn on the second switch.

公开(公告)号：US10740279B2

公开(公告)日：2020-08-11

申请号：US16054134

申请日：2018-08-03

Applicant: ASUSTEK COMPUTER INC.

Inventor： Li-Chien Wan

IPC: H05K1/00 ,  G06F15/78 ,  H05K1/14 ,  H05K1/02 ,  H05K1/11

Abstract: A motherboard includes a multilayer printed circuit board (PCB), a central processing unit (CPU) slot, at least one first memory slot, at least one second memory slot, a plurality of first traces, and a plurality of second traces. The CPU slot, the first memory slot, and the second memory slot are disposed on the first wiring layer of the multilayer PCB, and the second memory slot is disposed between the first memory slot and the CPU slot. The first traces are disposed on the first wiring layer of the multilayer PCB. The CPU slot is electrically connected to the first memory slot by the first traces. The second traces are disposed on the second wiring layer of the multilayer PCB which is different from the first wiring layer, and the CPU slot is electrically connected with the second memory slot by the second traces.