公开(公告)号：US11127747B2

公开(公告)日：2021-09-21

申请号：US16549519

申请日：2019-08-23

Applicant: Micron Technology, Inc.

Inventor： Kamal M. Karda ,  Akira Goda ,  Sanh D. Tang ,  Gurtej S. Sandhu ,  Litao Yang ,  Haitao Liu

IPC: H01L27/11524 ,  H01L27/1157 ,  H01L29/24 ,  H01L29/786 ,  H01L23/522 ,  H01L27/11556 ,  H01L27/11582 ,  H01L23/528

Abstract: A transistor comprises a 2D material structure and a gate structure. The 2D material structure conformally extends on and between surfaces of dielectric fin structures extending in parallel in a first horizontal direction, and comprises a source region, a drain region, and a channel region positioned between the source region and the drain region in the first horizontal direction. The gate structure overlies the channel region of the 2D material structure and extends in a second horizontal direction orthogonal to the first horizontal direction. The gate structure is within horizontal boundaries of the channel region of the 2D material structure in the first horizontal direction. Microelectronic devices, memory devices, and electronic systems are also described.

公开(公告)号：US11018255B2

公开(公告)日：2021-05-25

申请号：US16110217

申请日：2018-08-23

Applicant: Micron Technology, Inc.

Inventor： Haitao Liu ,  Guangyu Huang ,  Chandra V. Mouli ,  Akira Goda ,  Deepak Chandra Pandey ,  Kamal M. Karda

IPC: H01L29/78 ,  H01L29/24 ,  H01L29/423 ,  H01L29/267 ,  H01L27/11556 ,  H01L29/66 ,  H01L21/02 ,  H01L21/44 ,  H01L27/11582 ,  H01L29/08 ,  H01L21/425 ,  H01L29/10 ,  H01L29/786 ,  H01L27/1157 ,  H01L29/36 ,  H01L29/49 ,  H01L29/417

Abstract: A device includes a string driver comprising a channel region between a drain region and a source region. At least one of the channel region, the drain region, and the source region comprises a high band gap material. A gate region is adjacent and spaced from the high band gap material. The string driver is configured for high-voltage operation in association with an array of charge storage devices (e.g., 2D NAND or 3D NAND). Additional devices and systems (e.g., non-volatile memory systems) including the string drivers are disclosed, as are methods of forming the string drivers.

公开(公告)号：US20210134825A1

公开(公告)日：2021-05-06

申请号：US17145131

申请日：2021-01-08

Applicant: Micron Technology, Inc.

Inventor： Haitao Liu ,  Kamal M. Karda ,  Gurtej S. Sandhu ,  Sanh D. Tang ,  Akira Goda ,  Lifang Xu

IPC: H01L27/11573 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  G11C16/08 ,  H01L23/532 ,  H01L21/28

Abstract: A memory can have a stacked memory array that can have a plurality of levels of memory cells. Each respective level of memory cells can be commonly coupled to a respective access line. A plurality of drivers can be above the stacked memory array. Each respective driver can have a monocrystalline semiconductor with a conductive region coupled to a respective access line.

公开(公告)号：US10943915B1

公开(公告)日：2021-03-09

申请号：US16552257

申请日：2019-08-27

Applicant: Micron Technology, Inc.

Inventor： Kamal M. Karda ,  Albert Fayrushin ,  Haitao Liu ,  Kirk D. Prall

IPC: H01L27/11553 ,  H01L27/11556 ,  H01L27/11582

Abstract: Some embodiments include an assembly having a memory cell with an active region which includes a body region between a pair of source/drain regions. A charge-storage material is adjacent to the body region. A conductive gate is adjacent to the charge-storage material. A hole-recharge arrangement is configured to replenish holes within the body region during injection of holes from the body region to the charge-storage material. The hole-recharge arrangement includes a heterostructure active region having at least one source/drain region of a different composition than the body region, and/or includes an extension coupling the body region with a hole-reservoir. A wordline is coupled with the conductive gate. A first comparative digit line is coupled with one of the source/drain regions, and a second comparative digit line is coupled with the other of the source/drain regions.

公开(公告)号：US10937904B2

公开(公告)日：2021-03-02

申请号：US15890530

申请日：2018-02-07

Applicant: Micron Technology, Inc.

Inventor： Haitao Liu ,  Kamal M. Karda ,  Albert Fayrushin

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/51 ,  H01L27/11556 ,  H01L27/11582 ,  H01L21/28 ,  H01L27/11597 ,  H01L29/792 ,  H01L27/1157 ,  H01L27/1159 ,  H01L29/66

Abstract: A programmable charge-storage transistor comprises channel material, insulative charge-passage material, charge-storage material, a control gate, and charge-blocking material between the charge-storage material and the control gate. The charge-blocking material comprises a non-ferroelectric insulator material and a ferroelectric insulator material. Arrays of elevationally-extending strings of memory cells of memory cells are disclosed, including methods of forming such. Other embodiments, including method, are disclosed.

公开(公告)号：US20210050443A1

公开(公告)日：2021-02-18

申请号：US16542078

申请日：2019-08-15

Applicant: Micron Technology, Inc.

Inventor： Kamal M. Karda ,  Chandra Mouli ,  Haitao Liu

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/04 ,  H01L29/267 ,  H01L29/45 ,  H01L29/08 ,  H01L29/10 ,  H01L27/108

Abstract: Some embodiments include an integrated assembly having a semiconductor material with a more-doped region adjacent to a less-doped region. A two-dimensional material is between the more-doped region and a portion of the less-doped region. Some embodiments include an integrated assembly which contains a semiconductor material, a metal-containing material over the semiconductor material, and a two-dimensional material between a portion of the semiconductor material and the metal-containing material. Some embodiments include a transistor having a first source/drain region, a second source/drain region, a channel region between the first and second source/drain regions, and a two-dimensional material between the channel region and the first source; drain region.

公开(公告)号：US10903223B2

公开(公告)日：2021-01-26

申请号：US16248248

申请日：2019-01-15

Applicant: Micron Technology, Inc.

Inventor： Haitao Liu ,  Kamal M. Karda ,  Gurtej S. Sandhu ,  Sanh D. Tang ,  Akira Goda ,  Lifang Xu

IPC: H01L27/115 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  G11C16/08 ,  H01L23/532 ,  H01L21/28 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11526

Abstract: A memory can have a stacked memory array that can have a plurality of levels of memory cells. Each respective level of memory cells can be commonly coupled to a respective access line. A plurality of drivers can be above the stacked memory array. Each respective driver can have a monocrystalline semiconductor with a conductive region coupled to a respective access line.

公开(公告)号：US20200286893A1

公开(公告)日：2020-09-10

申请号：US16291597

申请日：2019-03-04

Applicant: Micron Technology, Inc.

Inventor： Arzum F. Simsek-Ege ,  Kamal M. Karda ,  Haitao Liu

IPC: H01L27/108 ,  H01L21/28 ,  H01L21/285

Abstract: An example apparatus includes a first source/drain region and a second source/drain region formed in a substrate. The first source/drain region and the second source/drain region are separated by a channel. The apparatus includes a gate opposing the channel. The gate includes noble metal nanoparticles. A sense line is coupled to the first source/drain region and a storage node is coupled to the second source/drain region.

公开(公告)号：US10388864B2

公开(公告)日：2019-08-20

申请号：US15684081

申请日：2017-08-23

Applicant: Micron Technology, Inc.

Inventor： Kamal M. Karda ,  Gurtej S. Sandhu ,  Chandra Mouli

IPC: H01L29/66 ,  H01L45/00 ,  H01L29/78 ,  H01L29/267 ,  H01L21/02 ,  H01L27/115 ,  H01L29/12 ,  H01L29/786 ,  H01L23/535 ,  H01L27/22 ,  H01L27/24 ,  H01L43/02 ,  H01L43/10

Abstract: Some embodiments include a transistor having a drain region and a source region. A conductive gate is between the source and drain regions. First channel material is between the gate and the source region. The first channel material is spaced from the gate by one or more insulative materials. Second channel material is between the first channel material and the source region, and directly contacts the source region. The first and second channel materials are transition metal chalcogenide. One of the source and drain regions is a hole reservoir region and the other is an electron reservoir region. Tunnel dielectric material may be between the first and second channel materials.

公开(公告)号：US20190252553A1

公开(公告)日：2019-08-15

申请号：US16132879

申请日：2018-09-17

Applicant: Micron Technology, Inc.

Inventor： Haitao Liu ,  Yunfei Gao ,  Kamal M. Karda ,  Deepak Chandra Pandey ,  Sanh D. Tang ,  Litao Yang

IPC: H01L29/786 ,  H01L29/78 ,  H01L27/088

Abstract: Systems, apparatuses and methods related to access devices formed with conductive contacts are described. An example apparatus may include an access device that includes a field-effect transistor (FET). A vertical pillar may be formed to include a channel of the FET, with a portion of the vertical pillar formed between at least two gates of the FET (i.e., a multi-gate Fin-FET). A conductive contact may be coupled to a body region of the vertical pillar.