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公开(公告)号：US20240214115A1
公开(公告)日：2024-06-27
申请号：US18396528
申请日：2023-12-26
Inventor： Soo Yeob JUNG , Mi Kyung OH , Joon Gyu RYU , Sang Jae LEE
CPC classification number: H04L1/0061 , H04L1/0071 , H04L5/0012 , H04L27/2605
Abstract: A transmission device in a satellite IoT system may comprise: a CRC value generator that receives first data and generates and outputs a payload CRC value; a forward error correction encoder that receives second data consisting of the first data and the payload CRC value from the CRC value generator, and performs forward error correction coding on the second data; an interleaver that receives third data consisting of the forward error correction coded first data and the payload CRC value from the forward error correction encoder, and outputs interleaved payload blocks by performing cyclic shifts on the forward error correction coded first data based on offsets; and a frequency hopping unit that receives the interleaved payload blocks from the interleaver, and generates and transmits payload blocks frequency-hopped according to a hopping sequence.
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公开(公告)号：US20240213685A1
公开(公告)日：2024-06-27
申请号：US18473854
申请日：2023-09-25
Inventor： Bong Hyuk PARK , Sunwoo KONG , SEUNG HUN WANG , Hui Dong LEE , Seunghyun JANG , Seok Bong HYUN
CPC classification number: H01Q13/08 , H01Q1/2283
Abstract: An antenna system and an apparatus including the same are provided. The antenna system includes at least one antenna module, wherein the antenna module may include a plurality of antennas formed on one surface of a first board, and a beamforming chip formed on one surface of a second board, wherein the plurality of antennas is connected to the beamforming chip through a plurality of microstrip lines and a waveguide.
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公开(公告)号：US20240213372A1
公开(公告)日：2024-06-27
申请号：US18487625
申请日：2023-10-16
Inventor： Yong Hae KIM , Jong-Heon YANG , Seong-Mok CHO , Ji Hun CHOI , Jae-Eun PI , Chi-Sun HWANG
IPC: H01L29/786 , H01L27/06 , H01L29/417 , H01L29/66
CPC classification number: H01L29/78642 , H01L27/0629 , H01L28/20 , H01L29/41733 , H01L29/6675 , H01L29/66772 , H01L29/66969 , H01L29/78654 , H01L29/78672 , H01L29/7869 , H01L29/78696
Abstract: Provided is a method for manufacturing a vertical channel thin film transistor. The method for manufacturing the vertical channel thin film transistor includes forming a bottom source drain electrode, forming a first interlayer insulating layer, forming first middle source drain electrodes, forming a second interlayer insulating layer, forming a top source drain electrode, forming an opening through which portions of the bottom source drain electrode, the first middle source drain electrodes, and the top source drain electrode are exposed, forming channel layers, forming a gate insulating layer on the channel layers, the bottom source drain electrode, the first middle source drain electrodes, and the top source drain electrode, and forming gate electrodes on the gate insulating layer.
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公开(公告)号：US20240212276A1
公开(公告)日：2024-06-27
申请号：US18451573
申请日：2023-08-17
Inventor： Hae Dong KIM
Abstract: The present disclosure relates to a method and apparatus for a metaverse performance contents authoring system. A method according to an embodiment of the present disclosure may comprise generating one or more assets related to performance authoring on a metaverse-based platform; and registering the generated one or more assets in a management server linked with the metaverse-based performance authoring system. The one or more assets may be shared on the metaverse-based platform and applied to the performance authoring. The one or more assets may include at least one of the following assets. The following assets include performance prop assets related to objects, performance effect assets related to special effects, or performance environment assets related to an overall configuration used in a performance.
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公开(公告)号：US20240211211A1
公开(公告)日：2024-06-27
申请号：US18488124
申请日：2023-10-17
Inventor： Won JEON
CPC classification number: G06F7/5443 , G06F7/4876
Abstract: A MAC apparatus using a floating point unit is provided. The MAC apparatus includes: a multiplier that performs a multiplication operation on floating point data; an adder that performs an addition operation between the floating point data calculated by the multiplier and floating point data accumulated in an accumulation register; the accumulation register that accumulates the floating point data calculated by the adder; and an input division controller that, when two pieces of floating point data A and B larger than a calculated data type on which the multiplier performs operation processing are input as operands, divides the two pieces of floating point data A and B into a plurality of pieces of floating point data Aa, Ab, Bc, and Bd according to a specified method and inputs the floating point data Aa, Ab, Bc, and Bd to the multiplier.
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Patent Agency Ranking
公开(公告)号：US12021923B2
公开(公告)日：2024-06-25
申请号：US18188229
申请日：2023-03-22
Inventor： Hoi-Yoon Jung , Sung-Ik Park , Nam-Ho Hur , David Gomez-Barquero , Carlos Barjau Estevan
IPC: H04L67/1021 , H04L69/08 , H04L69/164
CPC classification number: H04L67/1021 , H04L69/08 , H04L69/164
Abstract: Disclosed herein are a content provision method and apparatus using a convergence network. The content provision method may include creating a Quick UDP Internet Connections V1 (QUICV1) path with User Equipment (UE) through a Fifth-Generation (5G) core, when content satisfies a preset condition while the content is being provided to the UE through the QUICV1 path, determining to offload the content through the 5G core, creating an Internet Protocol Security (IPSEC) tunnel with an Advanced Television Systems Committee (ATSC) gateway (GW) through the 5G core, generating a QUIC multicast stream, providing QUIC multicast session information to multiple UE devices, and providing the content to multiple UE devices, for which a mode switches from a QUICV1 mode to a QUIC multicast mode, through the ATSC GW.
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公开(公告)号：US12021563B2
公开(公告)日：2024-06-25
申请号：US17851148
申请日：2022-06-28
Inventor： Hae Chung Kang , Eun Kyu Kang , Jong Jin Lee , Sang Jin Kwon , Won Bae Kwon , Dae Seon Kim , Dae Woong Moon , Soo Yong Jung , Gye Sul Cho
CPC classification number: H04B10/5053 , G02B6/32 , G02B6/4206 , G02B6/4212 , G02B6/4239 , H04B10/25 , H04B10/50 , H04B10/503
Abstract: A highly integrated multi-channel optical module is provided. The optical module includes an optical source device mounted on a substrate by an optical source mount unit, a waveguide mounted on the substrate by a waveguide mount unit, a lens mount unit disposed between the optical source device and the waveguide and mounted on the substrate, and a lens unit fixed to the lens mount unit by an adhesive cured by ultraviolet (UV) parallel light, wherein a light path of the UV parallel light is formed in the lens mount unit by a reflector attached on a side surface of the lens mount unit, and the UV parallel light moves along the light path and cures the adhesive coated on an upper portion of the lens mount unit facing a lower end portion of the lens unit.
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公开(公告)号：US12021151B2
公开(公告)日：2024-06-25
申请号：US17523320
申请日：2021-11-10
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , Korea Advanced Institute of Science and Technology
Inventor： Chi-Sun Hwang , SangHee Park , KwangHeum Lee , Jae-Eun Pi , SeungHee Lee , Jong-Heon Yang , Ji Hun Choi
IPC: H01L29/786 , H01L21/768 , H01L21/8234 , H01L29/40 , H01L29/49 , H01L29/66
CPC classification number: H01L29/78642 , H01L21/76877 , H01L21/823418 , H01L21/823437 , H01L29/401 , H01L29/4908 , H01L29/6653 , H01L29/6675 , H01L29/66969 , H01L29/78696 , H01L29/7869
Abstract: A vertical channel thin film transistor includes substrate, lower source/drain electrode, spacer layer, upper source/drain electrode covering portion of upper surface of the spacer layer, interlayer insulating pattern covering portion of upper surface of the upper source/drain electrode and upper surface of the spacer layer exposed by the upper source/drain electrode, contact hole disposed on the lower source/drain electrode and passing through the interlayer insulating pattern, the upper source/drain electrode, and the spacer layer, active pattern covering inner wall and bottom surface of the contact hole and extending over upper surface of the upper source/drain electrode and upper surface of the interlayer insulating pattern, gate insulating pattern filling portion of the contact hole and extending along upper surface of the active pattern, and gate electrode filling portion of the contact hole and extending along upper surface of the gate insulating pattern.
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公开(公告)号：US20240204894A1
公开(公告)日：2024-06-20
申请号：US18526232
申请日：2023-12-01
Inventor： Han Jun PARK , An Seok LEE , Yong Jin KWON , Heesoo LEE , Yu Ro LEE , Yun Joo KIM , Jung Bo SON , Hyun Seo PARK
IPC: H04B17/391 , G01S5/02
CPC classification number: H04B17/3913 , G01S5/0236
Abstract: A method of a terminal may comprise: receiving augmentation assistance information from a base station; generating augmented channel data by applying the augmentation assistance information to original channel data; and training an artificial neural network using the augmented channel data.
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公开(公告)号：US20240202004A1
公开(公告)日：2024-06-20
申请号：US18361561
申请日：2023-07-28
Inventor： Joo Hyun LEE
IPC: G06F9/38
CPC classification number: G06F9/3885
Abstract: Provided is a parallel processing device with one or more group processors, in which each of the one or more group processors includes a plurality of instance processors configured to process a kernel execution instance for a predetermined parallel program model-based kernel, each of the plurality of instance processors includes a register storing context reference information including an identifier of a group processor to which the instance processor belongs and an identifier of the instance processor, and each of the plurality of instance processors executes the kernel by reading execution context data, which is stored in a memory for execution of the kernel, using the context reference instance.
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