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211.发明授权公开(公告)号：US12120921B2
公开(公告)日：2024-10-15
申请号：US16924194
申请日：2020-07-09
Inventor： Wenbin Jia
IPC: H01L27/32 , H10K59/122 , H10K71/13 , H10K71/15
CPC classification number: H10K59/122 , H10K71/135 , H10K71/15
Abstract: A display substrate includes a peripheral display region and a central display region. Multiple first pixel units are regularly arranged within the peripheral display region, and multiple second pixel units are regularly arranged within the central display region. Pixels Per Inch of the first pixel units within the peripheral display region is greater than Pixels Per Inch of the second pixel units within the central display region; or, Pixels Per Inch of the first pixel units within the peripheral display region is equal to Pixels Per Inch of the second pixel units within the central display region, and an area of the first pixel unit is larger than an area of the second pixel unit.
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公开(公告)号：US20240321195A1
公开(公告)日：2024-09-26
申请号：US18257385
申请日：2022-06-24
IPC: G09G3/3225 , G02F1/1345 , G09G3/32 , G09G3/36 , H10K59/126 , H10K59/131
CPC classification number: G09G3/3225 , G02F1/13452 , G09G3/32 , G09G3/3648 , H10K59/126 , H10K59/131 , G09G2300/0426 , G09G2310/0291 , G09G2320/0219 , G09G2370/14
Abstract: A display module includes a display panel, at least one bonding circuit board, a plurality of chip-on-films, and a plurality of buffer devices. The at least one bonding circuit board each include first differential lines, and a first differential line includes a P-polarity differential sub-line and an N-polarity differential sub-line. An end of a chip-on-film is connected to the first differential line, and the other end of the chip-on-film is connected to the display panel. The buffer devices are arranged on the bonding circuit board, a buffer device is connected to ends, proximate to the chip-on-film, of the P-polarity differential sub-line and the N-polarity differential sub-line, and the buffer device is configured to reduce signal reflection between the first differential line and the chip-on-film.
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公开(公告)号：US20240306457A1
公开(公告)日：2024-09-12
申请号：US18245134
申请日：2022-03-25
Inventor： Liu WU , Zhidong YUAN , Yongqian LI , Can YUAN , Chuanchuan CHANG , Jun LIU , Tao SUN
IPC: H10K59/131 , H10K59/12 , H10K59/88
CPC classification number: H10K59/1315 , H10K59/1201 , H10K59/88
Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes: a base substrate including a special-shaped display area and a frame area located on one side of the special-shaped display area; and the special-shaped display area includes a first display area and a second display area on located on one side of the first display area, and the second display area is arranged in contact with the frame area; a group of data lines located on the base substrate and located in the first display area and the second display area; a group of fan-out lines located on a side of a layer where the group of data lines are located away from the base substrate, located in the first display area, and electrically connected to the data lines; and a group of dummy leads.
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公开(公告)号：US20240306442A1
公开(公告)日：2024-09-12
申请号：US18026344
申请日：2022-05-19
Inventor： Xuehuan FENG , Yongqian LI
IPC: H10K59/131 , H10K59/12
CPC classification number: H10K59/131 , H10K59/1201
Abstract: Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a plurality of sub-pixels, wherein at least one sub-pixel includes a pixel drive circuit, the pixel drive circuit is respectively connected with a scan signal line (41, 42) and a first power supply line (60); and in at least one sub-pixel, the scan signal line (41, 42) is provided with at least one fracture (K1, K2), scan signal lines (41, 42) on both sides of the fracture (K1, K2) are connected with each other through a signal connection electrode (91, 92), a length of the signal connection electrode (91, 92) is larger than a width of the first power supply line (60), and the length of the signal connection electrode (91, 92) is smaller than a width of the sub-pixel.
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公开(公告)号：US12087235B2
公开(公告)日：2024-09-10
申请号：US17781776
申请日：2021-05-28
Inventor： Song Meng , Jingbo Xu , Jianbo Xian
IPC: G09G5/10 , G09G3/3233 , G09G3/3275
CPC classification number: G09G3/3275 , G09G3/3233 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , G09G2320/0233
Abstract: An organic light-emitting diode display panel and a sensing method and a driving method therefor are provided. The organic light-emitting diode display panel includes a plurality of pixel units arranged in an array, each pixel unit includes a plurality of sub-pixels, and at least two sub-pixels are connected to a same sensing signal line. The sensing method includes: sequentially applying sensing data signals to the sub-pixels in the organic light-emitting diode display panel, and sequentially outputting sensing signals through sensing signal lines, to sense the sub-pixels, so as to compensate the sub-pixels. Among the sub-pixels connected to the same sensing signal line, sub-pixels, other than a sub-pixel which is currently sensed, are applied with a zero-gray-scale data signal.
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Patent Agency Ranking
216.发明授权公开(公告)号：US12080364B2
公开(公告)日：2024-09-03
申请号：US17791597
申请日：2020-12-26
Inventor： Xuehuan Feng , Yongqian Li
IPC: G11C19/28
CPC classification number: G11C19/287 , G09G2310/0286
Abstract: A shift register includes a first scan unit including a first input circuit and a first output circuit, and a second scan unit including a second input circuit, a second output circuit, and a potential boost circuit. The first input circuit is configured to transmit an input signal to a first pull-up node. The first output circuit is configured to, under a control of a voltage of the first pull-up node, output a shift signal and a first scan signal. The second input circuit is configured to transmit the input signal to a second pull-up node. The second output circuit is configured to output a second scan signal under a control of a voltage of the second pull-up node. The potential boost circuit is configured to boost the voltage of the second pull-up node in cooperation with the second output circuit.
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公开(公告)号：US20240276777A1
公开(公告)日：2024-08-15
申请号：US18023728
申请日：2022-06-30
Inventor： Longfei YAN , Di WU
IPC: H10K59/122 , H10K59/131 , H10K59/35
CPC classification number: H10K59/122 , H10K59/131 , H10K59/353
Abstract: A display substrate includes a light emitting structure layer disposed on a base substrate, the light emitting structure layer includes a first electrode layer, a pixel definition layer, a light emitting functional layer and a second electrode layer; the first electrode layer includes multiple first electrodes; the pixel definition layer is disposed on a side of the first electrodes away from the base substrate, and is provided with multiple pixel openings and multiple flow channels; the pixel openings expose surfaces of the first electrodes away from the base substrate, each flow channel is located between two adjacent pixel openings in the first direction and communicates the two adjacent pixel openings in the first direction; the light emitting functional layer includes a first functional layer and a light emitting layer that are stacked; the first functional layer is disposed on surfaces of the first electrodes away from the base substrate.
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公开(公告)号：US20240276776A1
公开(公告)日：2024-08-15
申请号：US18023382
申请日：2022-05-26
Inventor： Wenbin JIA
IPC: H10K59/122 , H10K59/121
CPC classification number: H10K59/122 , H10K59/121
Abstract: A display substrate includes a display area including multiple first electrodes and a pixel definition layer; the pixel definition layer includes multiple blocking portions extending in a second direction and spaced in a first direction, and multiple groups of spacing portions spaced in the second direction, each group of spacing portions includes multiple spacing portions spaced in the first direction, each spacing portion is between two adjacent blocking portions; a portion of a blocking portion between two adjacent spacing portions in the first direction is a first portion, and a portion of the blocking portion between two adjacent first portions is a second portion; in the display area, the first portion includes a first material layer and a second material layer that are sequentially stacked in a direction away from the base substrate, a material of the second material layer is the same as a material of the second portions.
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公开(公告)号：US20240268171A1
公开(公告)日：2024-08-08
申请号：US18021646
申请日：2022-05-25
Inventor： Xuehuan FENG , Yongqian LI
IPC: H10K59/131 , H10K59/121 , H10K59/35
CPC classification number: H10K59/1315 , H10K59/1213 , H10K59/351
Abstract: An array substrate and a display device are provided. The array substrate includes a base substrate, and gate lines, a gate driving structure, an interconnecting structure and an insulating layer. The gate lines are electrically connected with the gate driving structure through the interconnecting structure; the insulating layer is located between the gate lines and the interconnecting structure, and includes a first via hole and a second via hole. The gate line includes a first connecting portion and a second connecting portion, and the second connecting portion is located between the gate driving structure and the first connecting portion; the first connecting portion is electrically connected with the interconnecting structure through the first via hole, and a straight line extending in a direction perpendicular to the base substrate passes through the second connecting portion, the second via hole and the interconnecting structure in turn.
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公开(公告)号：US20240251636A1
公开(公告)日：2024-07-25
申请号：US18005676
申请日：2022-02-28
Inventor： XinXin Wang , Dacheng Zhang , Ning Liu , Yu Wang , Bin Zhou , Can Yuan
IPC: H10K59/80 , H10K59/12 , H10K59/124
CPC classification number: H10K59/80522 , H10K59/1201 , H10K59/124
Abstract: An OLED display panel includes a base substrate and an OLED device on the base substrate. The OLED device includes: an auxiliary electrode in the non-light-emitting region, the auxiliary electrode includes a conductive layer and a conductive column on a side of the conductive layer away from the base substrate, and an orthographic projection of the conductive column on the base substrate is within an orthographic projection of the conductive layer on the base substrate; and an insulating layer between the conductive layer and the base substrate; a groove is arranged on a surface of the insulating layer away from the base substrate, and an orthographic projection of the groove on the base substrate at least partially overlaps with the orthographic projection of the isolation structure on the base substrate.
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