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公开(公告)号:US20200210569A1
公开(公告)日:2020-07-02
申请号:US16728946
申请日:2019-12-27
Inventor: Diana Moisuc , Christophe Laurencin
Abstract: In an embodiment, an electronic circuit includes a plurality of protective nodes. Each protective node includes at least one monitoring circuit for processing information representative of a detection of a disturbance based on a detection circuit; and at least one reaction circuit for implementing a countermeasure controlled by the monitoring circuit.
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公开(公告)号:US20200081776A1
公开(公告)日:2020-03-12
申请号:US16562025
申请日:2019-09-05
Applicant: STMicroelectronics (Grenoble 2) SAS , STMicroelectronics (Alps) SAS , STMicroelectronics (Rousset) SAS
Inventor: Gerald BRIAT , Antoine DE-MUYNCK , Alessandro BASTONI , Stephane MARMEY
Abstract: An error-correction code memory includes memory locations for storing data. The memory is programmed to store one or more intentionally invalid words. Testing of an error correction circuit for the memory is performed by accessing the one or more intentionally invalid words and performing an error detection and error correction operation.
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公开(公告)号:US10534389B2
公开(公告)日:2020-01-14
申请号:US16130706
申请日:2018-09-13
Applicant: STMicroelectronics (Alps) SAS
Inventor: Kuno Lenz
Abstract: In some embodiments, a Miller compensation and stabilization device for a feedback control loop includes a capacitor and a control circuit. The capacitor has a first terminal configured to be coupled to an output of a comparator of the feedback control loop and a second terminal. The control circuit is coupled to the second terminal of the capacitor and is configured to control, in response to a voltage applied to a setpoint input of the feedback control loop, a first voltage across the first and second terminals of the capacitor by controlling a value of a potential of the second terminal of the capacitor such that the first voltage is lower than a threshold.
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公开(公告)号:US10514749B2
公开(公告)日:2019-12-24
申请号:US15467614
申请日:2017-03-23
Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics (Alps) SAS , STMicroelectronics SA
Inventor: Vincent Huard , Silvia Brini , Chittoor Parthasarathy
IPC: G06F1/26 , G06F1/32 , G06F1/3234 , G06F11/30 , G06F11/32 , G06F15/78 , G06F1/3206 , G06F1/324 , G06F1/3296
Abstract: A system on a chip includes at least one integrated circuit that is configured to operate at least at one operating point. A monitoring circuit acquires at least the cumulative duration of activity of the at least one integrated circuit. An evaluation circuit establish at least one instantaneous state of aging of the at least one integrated circuit based on the at least one cumulative duration of activity. An adjustment circuit operates to change the at least one operating point on the basis of the at least one state of aging of the at least one integrated circuit.
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公开(公告)号:US20190319540A1
公开(公告)日:2019-10-17
申请号:US16385214
申请日:2019-04-16
Applicant: STMicroelectronics (Alps) SAS
Inventor: Patrik Arno
IPC: H02M3/158
Abstract: In an embodiment, an SMPS comprises a half-bridge, and a driver configured to drive the half-bridge based on a PWM signal. The SMPS further comprising a first circuit coupled between the output of the driver and a control terminal of a high-side transistor of the half-bridge, wherein the first circuit is configured to maintain the first transistor on when the PWM signal has a duty cycle that is substantially 100%.
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公开(公告)号:US20190191536A1
公开(公告)日:2019-06-20
申请号:US16285615
申请日:2019-02-26
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics Application GmbH , STMicroelectronics S.r.l.
Inventor: Philippe SIRITO-OLIVIER , Giovanni Luca TORRISI , Manuel GAERTNER , Fritz BURKHARDT
CPC classification number: H05B39/02 , B60Q1/00 , B60Q3/80 , H05B33/0806 , H05B33/0815 , H05B39/047
Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
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公开(公告)号:US10326482B2
公开(公告)日:2019-06-18
申请号:US16003623
申请日:2018-06-08
Applicant: STMicroelectronics (Alps) SAS
Inventor: Herve Jacob
Abstract: A transmission chain receives an incident signal to be transmitted having a first power and a first bandwidth. A first modulator frequency shifts a first signal derived from the incident signal to generate a first shifted signal at a modulation output. A power amplifier coupled to the modulation output amplifies an intermediate signal to generate an amplified output signal. A predistortion-signal-generating circuit generates, from the incident signal and from the amplified output signal in a second bandwidth that is larger than the first bandwidth, a predistortion signal having a second power lower than the first power. A second modulator frequency shifts a second signal derived from the predistortion signal to generate a second shifted signal for combination with the first shifted signal at said modulation output to produce the intermediate signal.
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公开(公告)号:US20190173427A1
公开(公告)日:2019-06-06
申请号:US16207751
申请日:2018-12-03
Inventor: Benoit MARCHAND , Francois DRUILHE
Abstract: A quartz crystal resonator is coupled to an electronic circuit. A capacitive or resistive element is provided for adjusting a frequency of the quartz crystal resonator on activation or deactivation of a function of a circuit. Control is made according to a model of an expected variation of a temperature of the quartz crystal resonator.
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公开(公告)号:US10264353B2
公开(公告)日:2019-04-16
申请号:US15473812
申请日:2017-03-30
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics Design and Application S.R.O. , STMicroelectronics (Alps) SAS
Inventor: Jean Claude Bini , Dragos Davidescu , Igor Cesko , Jonathan Cottinet
Abstract: Several first digital streams of first digital samples at a first sampling frequency are processed to issue corresponding stream that are converted into second digital streams sampled at a second sampling frequency lower than said first sampling frequency. At least one delay to be applied to at least one first digital stream to satisfy a condition on the second digital streams is determined and applied to at least one first digital stream before converting. The converting operation performed is decimation filtering of the first digital streams. The application of the at least one delay to at least one first steam involves skipping a number of first digital samples in the at least one first digital stream. The number skipped depends on the value of the at least one delay. Samples that are skipped are not delivered for decimation filtering.
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公开(公告)号:US10116037B2
公开(公告)日:2018-10-30
申请号:US15668816
申请日:2017-08-04
Inventor: David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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