公开(公告)号：US10254623B2

公开(公告)日：2019-04-09

申请号：US15679691

申请日：2017-08-17

Applicant: STMicroelectronics SA

Inventor： Valerie Danelon ,  Denis Pache ,  Christophe Arricastres

IPC: G02F1/225 ,  G02B6/293 ,  G02F1/025 ,  G02F1/21

Abstract: A Mach-Zehnder ring modulator includes a first optical path having a first diode and a optical path having a second diode. Each of the first and second diodes operates responsive to a voltage signal by modifying a phase of a light signal. A first optical coupler provides first and second light signals to the first and second optical paths, respectively. A second optical coupler couples outputs from the first and second optical paths. A feedback path is coupled between an output of the second optical coupler and an input of the first optical coupler.

公开(公告)号：US10234703B2

公开(公告)日：2019-03-19

申请号：US15468831

申请日：2017-03-24

Applicant: STMicroelectronics SA

Inventor： Jean-Robert Manouvrier

IPC: G02F1/01 ,  G01J9/00 ,  G01J9/02 ,  G02F1/025 ,  H04B10/50 ,  G02F1/21 ,  G02F1/225

Abstract: An optical modulator uses an optoelectronic phase comparator configured to provide, in the form of an electrical signal, a measure of a phase difference between two optical waves. The phase comparator includes an optical directional coupler having two coupled channels respectively defining two optical inputs for receiving the two optical waves to be compared. Two photodiodes are configured to respectively receive the optical output powers of the two channels of the directional coupler. An electrical circuit is configured to supply, as a measure of the optical phase shift, an electrical signal proportional to the difference between the electrical signals produced by the two photodiodes.

公开(公告)号：US20190018062A1

公开(公告)日：2019-01-17

申请号：US16031960

申请日：2018-07-10

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS ,  STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Pascal URARD ,  Florian CACHO ,  Vincent HUARD ,  Alok Kumar TRIPATHI

IPC: G01R31/3183 ,  G01R31/3185 ,  G01R31/3177 ,  G01R31/317 ,  G01R31/3181

CPC classification number: G01R31/318342 ,  G01R31/31725 ,  G01R31/3177 ,  G01R31/31816 ,  G01R31/318541 ,  G01R31/318552 ,  G01R31/318594 ,  G06F17/5031

Abstract: A flip flop includes a data input, a clock input, a test chain input, a test chain output, a monitoring circuit, and an alert transmission circuit. The monitoring circuit is adapted to generate an alert if the time between arrival of a data bit and a clock edge is less than a threshold. The alert transmission circuit is adapted to apply during a monitoring phase an alert level to the test chain output in the event of an alert generated by the monitoring circuit, and to apply the alert level to the test chain output when an alert level is received at the test chain input.

公开(公告)号：US10181654B2

公开(公告)日：2019-01-15

申请号：US14869811

申请日：2015-09-29

Applicant: STMICROELECTRONICS SA

Inventor： Jean-Francois Carpentier ,  Sébastien Pruvost ,  Patrice Garcia ,  Pierre Busson ,  Pierre Dautriche

IPC: H01Q21/00 ,  H01Q23/00 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00 ,  H01Q19/00 ,  H01Q19/10 ,  H01Q19/185 ,  H01L23/31 ,  H01L23/552

Abstract: A millimeter wave transceiver including a plate forming an interposer having its upper surface supporting an interconnection network and having its lower surface intended to be assembled on a printed circuit board by bumps; an integrated circuit chip assembled on the upper surface of the interposer; antennas made of tracks formed on the upper surface of the interposer; and reflectors on the upper surface of the printed circuit board in front of each of the antennas, the effective distance between each antenna and the reflector plate being on the order of one quarter of the wavelength, taking into account the dielectric constants of the interposed materials.

公开(公告)号：US10153754B2

公开(公告)日：2018-12-11

申请号：US15460520

申请日：2017-03-16

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics SA

Inventor： Alok Kumar Tripathi ,  Amit Verma ,  Pascal Urard

IPC: H03K3/012 ,  H03K3/356 ,  H03K19/00 ,  H03K3/3562

Abstract: A synchronous retention flip-flop circuit includes a first circuit module powered by an interruptible power source and a second circuit module powered by a permanent power source. The first circuit module includes a first latch circuit and a second latch circuit which are configured to store at least one datum while the interruptible power source is supplying power. A transmission circuit operates to deliver the at least one datum to the second circuit module before an interruption of the interruptible power source. The second circuit module preserves the at least one datum during the interruption. Following an end of the interruption, a restoring circuit transfers the at least one datum from the second circuit module to the first circuit module via a single one of the first and second latch circuits.

公开(公告)号：US10153036B2

公开(公告)日：2018-12-11

申请号：US15461979

申请日：2017-03-17

Applicant: STMicroelectronics SA

Inventor： Faress Tissafi Drissi

IPC: G11C11/34 ,  G11C11/419

Abstract: An autocorrective writing to a multiport static random access memory device is performed on at least one multiport static random access memory cell circuit. A first datum is written to the multiport static random access memory cell circuit and a second datum stored in the circuit is read from the multiport static random access memory cell subsequent to writing. The first and second data are compared. In response to the results of that comparison, an operation to rewriting the first datum to the circuit along with application of a write assist mechanism is selectively performed.

公开(公告)号：US10139563B2

公开(公告)日：2018-11-27

申请号：US14984563

申请日：2015-12-30

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Charles Baudot ,  Alain Chantre ,  Sébastien Cremer

IPC: G02B6/34 ,  G02B6/122 ,  G02B6/136 ,  G02B6/132 ,  G02B6/42 ,  G02B6/12

Abstract: A method is for making a photonic chip including EO devices having multiple thicknesses. The method may include forming a first semiconductor layer over a semiconductor film, forming a second semiconductor layer over the first semiconductor layer, and forming a mask layer over the second semiconductor layer. The method may include performing a first selective etching of the mask layer to provide initial alignment trenches, performing a second etching, aligned with some of the initial alignment trenches and using the first semiconductor layer as an etch stop, to provide multi-level trenches, and filling the multi-level trenches to make the EO devices having multiple thicknesses.

公开(公告)号：US20180331547A1

公开(公告)日：2018-11-15

申请号：US15968501

申请日：2018-05-01

Applicant: Commissariat à l'Energie Atomique et aux Energies Alternatives ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Séverin TROCHUT ,  Stéphane MONFRAY ,  Sébastien BOISSEAU

IPC: H02J7/00 ,  G01R31/36

Abstract: The invention concerns a measurement unit including: an electric ambient energy recovery generator; an element of capacitive storage of the electric energy generated by the generator; an electric battery; a first branch coupling an output node of the generator to a first electrode of the capacitive storage element; a second branch coupling a first terminal of the battery to the first electrode of the capacitive storage element; and an active circuit capable of transmitting a radio event indicator signal each time the voltage across the capacitive storage element exceeds a first threshold, wherein, in operation, the capacitive storage element simultaneously receives a first charge current originating from the generator via the first branch and a second charge current originating from the battery via the second branch.

公开(公告)号：US10126499B2

公开(公告)日：2018-11-13

申请号：US14754994

申请日：2015-06-30

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Jean-Robert Manouvrier ,  Jean-Francois Carpentier ,  Patrick Lemaitre

IPC: G02B6/34 ,  G02B6/124 ,  G02B6/30 ,  G02B6/293

Abstract: An electro-optic device may include a photonic chip having an optical grating coupler at a surface. The optical grating coupler may include a first semiconductor layer having a first base and first fingers extending outwardly from the first base. The optical grating coupler may include a second semiconductor layer having a second base and second fingers extending outwardly from the second base and being interdigitated with the first fingers to define semiconductor junction areas, with the first and second fingers having a non-uniform width. The electro-optic device may include a circuit coupled to the optical grating coupler and configured to bias the semiconductor junction areas and change one or more optical characteristics of the optical grating coupler.

公开(公告)号：US20180269199A1

公开(公告)日：2018-09-20

申请号：US15982443

申请日：2018-05-17

Applicant: STMicroelectronics SA

Inventor： Jean Jimenez ,  Boris Heitz ,  Johan Bourgeat ,  Agustin Monroy Aguirre

IPC: H01L27/02 ,  H01L27/102 ,  H01L27/12 ,  H01L29/74 ,  H01L29/87

CPC classification number: H01L27/0262 ,  H01L27/1027 ,  H01L27/1203 ,  H01L29/74 ,  H01L29/7408 ,  H01L29/7436 ,  H01L29/87 ,  H01L2924/1301

Abstract: A semiconductor device includes a thyristor disposed in a semiconductor body. The thyristor has an anode, a cathode, a first bipolar transistor located on an anode side, and a second bipolar transistor located on a cathode side. The first and second bipolar transistors are nested and connected between the anode and the cathode. A MOS transistor is disposed in the semiconductor body. The MOS transistor is coupled between a collector region and an emitter region of the second bipolar transistor. The MOS transistor has a gate region connected to the cathode via a resistive semiconductor region that incorporates at least a part of a base region of the second bipolar transistor.