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公开(公告)号:US20200257337A1
公开(公告)日:2020-08-13
申请号:US16862787
申请日:2020-04-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki MIYAKE , Hisao IKEDA
Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
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公开(公告)号:US20200227445A1
公开(公告)日:2020-07-16
申请号:US16834308
申请日:2020-03-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki MIYAKE
IPC: H01L27/12 , G09G3/3233 , G09G3/3275 , H01L27/06 , H01L33/62
Abstract: An object is to prevent an operation defect and to reduce an influence of fluctuation in threshold voltage of a field-effect transistor. A field-effect transistor, a switch, and a capacitor are provided. The field-effect transistor includes a first gate and a second gate which overlap with each other with a channel formation region therebetween, and the threshold voltage of the field-effect transistor varies depending on the potential of the second gate. The switch has a function of determining whether electrical connection between one of a source and a drain of the field-effect transistor and the second gate of the field-effect transistor is established. The capacitor has a function of holding a voltage between the second gate of the field-effect transistor and the other of the source and the drain of the field-effect transistor.
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公开(公告)号:US20190355760A1
公开(公告)日:2019-11-21
申请号:US16525846
申请日:2019-07-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kei TAKAHASHI , Hiroyuki MIYAKE
IPC: H01L27/12 , G09G3/3266 , G09G3/3225 , G09G3/3233
Abstract: A display device including a display portion with an extremely high resolution is provided. The display device includes a pixel circuit and a light-emitting element. The pixel circuit includes a first element layer including a first transistor and a second element layer including a second transistor. A channel formation region of the first transistor includes silicon. The first transistor has a function of driving the light-emitting element. The second transistor functions as a switch. A channel formation region of the second transistor includes a metal oxide. The metal oxide functions as a semiconductor. The second element layer is provided over the first element layer.
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公开(公告)号:US20190280014A1
公开(公告)日:2019-09-12
申请号:US16413917
申请日:2019-05-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Atsushi UMEZAKI , Hiroyuki MIYAKE
Abstract: To suppress fluctuation in the threshold voltage of a transistor, to reduce the number of connections of a display panel and a driver IC, to achieve reduction in power consumption of a display device, and to achieve increase in size and high definition of the display device. A gate electrode of a transistor which easily deteriorates is connected to a wiring to which a high potential is supplied through a first switching transistor and a wiring to which a low potential is supplied through a second switching transistor; a clock signal is input to a gate electrode of the first switching transistor; and an inverted clock signal is input to a gate electrode of the second switching transistor. Thus, the high potential and the low potential are alternately applied to the gate electrode of the transistor which easily deteriorates.
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公开(公告)号:US20190227600A1
公开(公告)日:2019-07-25
申请号:US16367905
申请日:2019-03-28
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiharu HIRAKATA , Hiroyuki MIYAKE , Seiko INOUE , Shunpei YAMAZAKI
Abstract: A display device with low power consumption is provided. Furthermore, a display device in which an image is displayed in a region that can be used in a folded state is provided. The conceived display device includes a display portion that can be opened and folded, a sensing portion that senses a folded state of the display portion, and an image processing portion that generates, when the display portion is in the folded state, an image in which a black image is displayed in part of the display portion.
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公开(公告)号:US20190181160A1
公开(公告)日:2019-06-13
申请号:US16277026
申请日:2019-02-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE
IPC: H01L27/12 , H01L29/786 , G09G3/20 , H01L29/45 , H01L29/423 , H01L29/417 , H01L29/24 , H01L29/10 , H01L29/04 , G11C19/28
Abstract: An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.
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公开(公告)号:US20190172408A1
公开(公告)日:2019-06-06
申请号:US16190205
申请日:2018-11-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hiroyuki MIYAKE
Abstract: A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal is input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.
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公开(公告)号:US20190088785A1
公开(公告)日:2019-03-21
申请号:US16121700
申请日:2018-09-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Jun KOYAMA , Hiroyuki MIYAKE , Kei TAKAHASHI , Kouhei TOYOTAKA , Masashi TSUBUKU , Kosei NODA , Hideaki KUWABARA
IPC: H01L29/786 , H01L29/26 , H01L23/66 , H01L27/12 , H01L27/088 , G06K19/077 , H01L29/66 , H01L29/24 , H01L21/8236 , G11C7/00 , G11C19/28 , H02M3/07
Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
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公开(公告)号:US20190033919A1
公开(公告)日:2019-01-31
申请号:US15986099
申请日:2018-05-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshiharu HIRAKATA , Hiroyuki MIYAKE , Seiko INOUE , Shunpei YAMAZAKI
Abstract: A display device with low power consumption is provided. Furthermore, a display device in which an image is displayed in a region that can be used in a folded state is provided. The conceived display device includes a display portion that can be opened and folded, a sensing portion that senses a folded state of the display portion, and an image processing portion that generates, when the display portion is in the folded state, an image in which a black image is displayed in part of the display portion.
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公开(公告)号:US20180197888A1
公开(公告)日:2018-07-12
申请号:US15904537
申请日:2018-02-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki MIYAKE , Kenichi OKAZAKI , Yasuharu HOSAKA , Yukinori SHIMA
IPC: H01L27/12 , H01L51/00 , H01L29/786 , H01L29/778 , H01L29/66 , H01L29/24 , H01L29/04 , H01L27/32
CPC classification number: H01L27/1225 , H01L27/127 , H01L27/3262 , H01L29/045 , H01L29/24 , H01L29/66969 , H01L29/7782 , H01L29/7786 , H01L29/78606 , H01L29/78648 , H01L29/7869 , H01L29/78696 , H01L51/005
Abstract: Provided is a novel semiconductor device. The semiconductor device comprises a first transistor and a second transistor. The first transistor comprises a first gate electrode; a first insulating film over the first gate electrode; a first oxide semiconductor film over the first insulating film; a first source electrode and a first drain electrode over the first oxide semiconductor film; a second insulating film over the first oxide semiconductor film, the first source electrode, and the first drain electrode; and a second gate electrode over the second insulating film. The second transistor comprises a first drain electrode; the second insulating film over the second drain electrode; a second oxide semiconductor film over the second insulating film; a second source electrode and a second drain electrode over the second oxide semiconductor film; a third insulating film over the second oxide semiconductor film, the second source electrode, and the second drain electrode; and a third gate electrode over the third insulating film. The first oxide semiconductor film partly overlaps with the second oxide semiconductor film.
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