-
公开(公告)号:US20190252536A1
公开(公告)日:2019-08-15
申请号:US16143676
申请日:2018-09-27
申请人: Intel Corporation
发明人: Hubert C. George , Ravi Pillarisetty , Lester Lampert , James S. Clarke , Nicole K. Thomas , Roman Caudillo , Kanwaljit Singh , David J. Michalak , Jeanette M. Roberts
IPC分类号: H01L29/778 , H01L29/51 , H01L29/49 , H01L27/02 , H01L29/15
CPC分类号: H01L29/7782 , G06N10/00 , H01L23/5383 , H01L27/0255 , H01L29/15 , H01L29/4966 , H01L29/517
摘要: A quantum dot device is disclosed that includes a fin and a gate above the fin. The fin may extend away from a base and include a quantum well stack in which one or more quantum dots may be formed during operation of the quantum dot device. The gate may include a gate electrode material having a first portion and a second portion, where the first portion is above the quantum well stack and the second portion is a portion that is not above the quantum well stack and is separated from the base by an insulating material. The quantum dot device may further include a metal structure between the second portion of the gate electrode material and the base, forming a portion of a diode provided in series with the gate, which diode may provide at least some ESD protection for the quantum dot device.
-
公开(公告)号:US20190051727A1
公开(公告)日:2019-02-14
申请号:US16152850
申请日:2018-10-05
发明人: Yasuharu Hosaka , Toshimitsu Obonai , Yukinori Shima , Masami Jintyou , Daisuke Kurosaki , Takashi Hamochi , Junichi Koezuka , Kenichi Okazaki , Shunpei Yamazaki
IPC分类号: H01L29/24 , H01L27/12 , C04B35/622 , H01L29/786 , H01L29/778 , C23C14/58 , C23C14/08 , C04B35/01 , C03C17/245 , C04B35/453
CPC分类号: H01L29/24 , C03C17/245 , C03C2217/23 , C03C2218/151 , C04B35/01 , C04B35/453 , C04B35/62218 , C04B2235/3217 , C04B2235/3225 , C04B2235/3284 , C04B2235/3286 , C04B2235/3293 , C04B2235/787 , C04B2235/96 , C23C14/08 , C23C14/5853 , H01L27/1225 , H01L29/7782 , H01L29/7786 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要: A metal oxide film includes indium, , ( is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
-
公开(公告)号:US10084045B2
公开(公告)日:2018-09-25
申请号:US15633918
申请日:2017-06-27
申请人: ATOMERA INCORPORATED
IPC分类号: H01L29/15 , H01L29/06 , H01L29/10 , H01L29/165 , H01L29/66
CPC分类号: H01L29/154 , H01L29/0642 , H01L29/0653 , H01L29/1054 , H01L29/1083 , H01L29/152 , H01L29/155 , H01L29/165 , H01L29/66431 , H01L29/66545 , H01L29/66621 , H01L29/7782
摘要: A semiconductor device may include a substrate having a channel recess therein, a plurality of spaced apart shallow trench isolation (STI) regions in the substrate, and source and drain regions spaced apart in the substrate and between a pair of the STI regions. A superlattice channel may be in the channel recess of the substrate and extend between the source and drain regions, with the superlattice channel including a plurality of stacked group of layers, and each group of layers of the superlattice channel including stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A replacement gate may be over the superlattice channel.
-
公开(公告)号:US20180174842A1
公开(公告)日:2018-06-21
申请号:US15834610
申请日:2017-12-07
申请人: Anatoly Feygenson
发明人: Anatoly Feygenson
IPC分类号: H01L21/223 , H01L29/36 , H01L21/02 , H01L29/66 , H01L29/15 , H01L21/67 , H01L21/3215 , H01L21/225 , H01L21/203 , H01L29/8605 , H01L29/772
CPC分类号: H01L29/7725 , H01L21/02 , H01L21/02381 , H01L21/02422 , H01L21/02532 , H01L21/02543 , H01L21/02557 , H01L21/02565 , H01L21/02576 , H01L21/02579 , H01L21/02584 , H01L21/0262 , H01L21/02631 , H01L21/203 , H01L21/2254 , H01L21/3215 , H01L21/32155 , H01L21/67167 , H01L21/67207 , H01L29/0847 , H01L29/122 , H01L29/155 , H01L29/157 , H01L29/1606 , H01L29/365 , H01L29/66 , H01L29/7782 , H01L29/8605
摘要: A novel doping technology for semiconductor wafers has been developed, referred to as a “quantum doping” process that permits the deposition of only a fixed, controlled number of atoms in the form of a monolayer in a substitutional condition where only unterminated surface bonds react with the dopant, thus depositing only a number of atoms equal to the atomic surface density of the substrate material. This technique results in providing a “quantized” set of possible dopant concentration values that depend only on the additional number of layers of substrate material formed over the single layer of dopant atoms.
-
公开(公告)号:US09960190B2
公开(公告)日:2018-05-01
申请号:US15464534
申请日:2017-03-21
发明人: Shunpei Yamazaki , Junichi Koezuka , Kenichi Okazaki , Yukinori Shima , Shinpei Matsuda , Haruyuki Baba , Ryunosuke Honda
IPC分类号: H01L29/786 , H01L27/12 , H01L29/66 , H01L29/778 , H01L29/24
CPC分类号: H01L27/1225 , H01L27/127 , H01L29/24 , H01L29/66969 , H01L29/7781 , H01L29/7782 , H01L29/7786 , H01L29/7869 , H01L29/78696
摘要: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
-
公开(公告)号:US09842921B2
公开(公告)日:2017-12-12
申请号:US14205811
申请日:2014-03-12
IPC分类号: B82Y10/00 , H01L29/778 , H01L29/423 , H01L29/76 , H01L29/41 , H01L29/12 , H01L27/088 , H01L29/165 , H01L29/16
CPC分类号: H01L29/7782 , H01L27/088 , H01L29/127 , H01L29/1606 , H01L29/165 , H01L29/41 , H01L29/413 , H01L29/423 , H01L29/4238 , H01L29/7613 , H01L29/778
摘要: A quantum semiconductor device is provided. The quantum semiconductor device includes a quantum heterostructure, a dielectric layer, and an electrode. The quantum heterostructure includes a quantum well layer that includes a first 2DEG region, a second 2DEG region, and a third 2DEG region. A first tunnel barrier exists between the first 2DEG region and the second 2DEG region. A second tunnel barrier exists between the second 2DEG region and the third 2DEG region. A third tunnel barrier exists either between the first 2DEG region and the third 2DEG region. The dielectric layer is formed on the quantum heterostructure. The electrode is formed on the dielectric layer directly above the first tunnel barrier.
-
公开(公告)号:US09722046B2
公开(公告)日:2017-08-01
申请号:US14948547
申请日:2015-11-23
申请人: ATOMERA INCORPORATED
CPC分类号: H01L29/154 , H01L29/0642 , H01L29/0653 , H01L29/1054 , H01L29/1083 , H01L29/152 , H01L29/155 , H01L29/165 , H01L29/66431 , H01L29/66545 , H01L29/66621 , H01L29/7782
摘要: A semiconductor device may include a substrate having a channel recess therein, a plurality of spaced apart shallow trench isolation (STI) regions in the substrate, and source and drain regions spaced apart in the substrate and between a pair of the STI regions. A superlattice channel may be in the channel recess of the substrate and extend between the source and drain regions, with the superlattice channel including a plurality of stacked group of layers, and each group of layers of the superlattice channel including stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A replacement gate may be over the superlattice channel.
-
公开(公告)号:US09691905B2
公开(公告)日:2017-06-27
申请号:US15182812
申请日:2016-06-15
发明人: Daigo Ito , Daisuke Matsubayashi , Masaharu Nagai , Yoshiaki Yamamoto , Takashi Hamada , Yutaka Okazaki , Shinya Sasagawa , Motomu Kurata , Naoto Yamade
IPC分类号: H01L21/00 , H01L21/16 , H01L29/786 , H01L29/66 , H01L21/425 , H01L21/46 , H01L27/12
CPC分类号: H01L29/78693 , H01L21/425 , H01L21/46 , H01L27/1207 , H01L27/1225 , H01L27/1262 , H01L29/24 , H01L29/42384 , H01L29/4908 , H01L29/66969 , H01L29/7782 , H01L29/7854 , H01L29/7855 , H01L29/78618 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要: A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).
-
公开(公告)号:US20170170211A1
公开(公告)日:2017-06-15
申请号:US15372494
申请日:2016-12-08
发明人: Shunpei YAMAZAKI
IPC分类号: H01L27/12 , H01L29/49 , H01L29/66 , H01L29/786
CPC分类号: H01L27/1225 , H01L29/24 , H01L29/4908 , H01L29/66969 , H01L29/7782 , H01L29/78648 , H01L29/7869 , H01L29/78696
摘要: To provide a transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device. By covering a side surface of an oxide semiconductor layer in which a channel is formed with an oxide semiconductor layer, diffusion of impurities into the inside from the side surface of the oxide semiconductor layer is prevented. By forming a gate electrode in a damascene process, miniaturization and high density of a transistor are achieved. By providing a protective layer covering a gate electrode over the gate electrode, the reliability of the transistor is increased.
-
公开(公告)号:US09673311B1
公开(公告)日:2017-06-06
申请号:US15182405
申请日:2016-06-14
发明人: Peter Moens , Jia Guo , Ali Salih , Chun-Li Liu
IPC分类号: H01L29/66 , H01L29/06 , H01L29/20 , H01L29/778 , H01L29/205 , H01L21/02
CPC分类号: H01L29/7783 , H01L21/0254 , H01L29/1029 , H01L29/2003 , H01L29/205 , H01L29/404 , H01L29/41766 , H01L29/66431 , H01L29/66446 , H01L29/66462 , H01L29/778 , H01L29/7782 , H01L29/7787 , H01L2924/13064
摘要: An electronic device can include a HEMT including at least two channel layers. In an embodiment, a lower semiconductor layer overlies a lower channel layer, wherein the lower semiconductor layer has an aluminum content that is at least 10% of a total metal content of the lower semiconductor layer. An upper semiconductor layer overlies the upper channel layer, wherein the upper semiconductor layer has an aluminum content that is greater as compared to the lower semiconductor layer. In another embodiment, an electronic device can include stepped source and drain electrodes, so that lower contact resistance can be achieved. In a further embodiment, an absolute value of a difference between pinch-off or threshold voltages between different channel layers is greater than 1 V and allows current to be turned on or turned off for a channel layer without affecting another channel layer.
-
-
-
-
-
-
-
-
-