Method and system for reducing critical dimension side-to-side tilting error
    21.
    发明授权
    Method and system for reducing critical dimension side-to-side tilting error 有权
    减少临界尺寸侧向倾斜误差的方法和系统

    公开(公告)号:US07917244B2

    公开(公告)日:2011-03-29

    申请号:US11686238

    申请日:2007-03-14

    CPC classification number: G03F7/70625 G03F7/705 G03F7/70533

    Abstract: A method for reducing a critical dimension error of a substrate is provided. A first function is identified for correlating a critical dimension error with a first effect. A second function is identified for correlating a critical dimension error with a scan speed. An optimal scan speed for minimizing the critical dimension error is identified by substantially equating the first function and the second function. The substrate may be a mask or a wafer.

    Abstract translation: 提供了一种降低衬底临界尺寸误差的方法。 识别出关键维度误差与第一效应相关联的第一功能。 识别出关键尺寸误差与扫描速度相关的第二个功能。 用于最小化临界尺寸误差的最佳扫描速度通过基本上等同于第一功能和第二功能来识别。 衬底可以是掩模或晶片。

    Method and System for Reducing Critical Dimension Side-to-Side Tilting Error
    22.
    发明申请
    Method and System for Reducing Critical Dimension Side-to-Side Tilting Error 有权
    减少临界尺寸侧向倾斜误差的方法和系统

    公开(公告)号:US20080228309A1

    公开(公告)日:2008-09-18

    申请号:US11686238

    申请日:2007-03-14

    CPC classification number: G03F7/70625 G03F7/705 G03F7/70533

    Abstract: A method for reducing a critical dimension error of a substrate is provided. A first function is identified for correlating a critical dimension error with a first effect. A second function is identified for correlating a critical dimension error with a scan speed. An optimal scan speed for minimizing the critical dimension error is identified by substantially equating the first function and the second function. The substrate may be a mask or a wafer.

    Abstract translation: 提供了一种降低衬底临界尺寸误差的方法。 识别出关键维度误差与第一效应相关联的第一功能。 识别出关键尺寸误差与扫描速度相关的第二个功能。 用于最小化临界尺寸误差的最佳扫描速度通过基本上等同于第一功能和第二功能来识别。 衬底可以是掩模或晶片。

    Method and System for Improving Critical Dimension Proximity Control of Patterns on a Mask or Wafer
    23.
    发明申请
    Method and System for Improving Critical Dimension Proximity Control of Patterns on a Mask or Wafer 有权
    用于改善面罩或晶片上图案的临界尺寸接近度控制的方法和系统

    公开(公告)号:US20080124826A1

    公开(公告)日:2008-05-29

    申请号:US11688141

    申请日:2007-03-19

    CPC classification number: G05B13/042

    Abstract: A method for improving critical dimension uniformity of a substrate is provided. An equation based on a proximity trend of a pattern on a first substrate is determined. The equation is applied in a regression model to determine a parameter value of a second substrate. A recipe of an exposure equipment is adjusted based on the parameter value for exposure of the second substrate. Also, a system for controlling critical dimension of a pattern on a substrate is provided. The system includes an advance process control system for collecting exposure data of the substrate, and a regression model within the advance process control system for analyzing the exposure data and determining a parameter value of a recipe of the exposure tool. The regression model is operable to determine an equation based on a proximity trend of the substrate.

    Abstract translation: 提供了一种改善基板的临界尺寸均匀性的方法。 确定基于第一基板上的图案的接近趋势的等式。 该方程式应用于回归模型中以确定第二衬底的参数值。 基于用于第二基板的曝光的参数值来调整曝光设备的配方。 另外,提供了一种用于控制衬底上图案的临界尺寸的系统。 该系统包括用于收集基板的曝光数据的前进过程控制系统和用于分析曝光数据并确定曝光工具的配方的参数值的提前过程控制系统内的回归模型。 回归模型可操作以基于衬底的接近趋势来确定方程。

    Luminary material and method for manufacturing the same
    24.
    发明授权
    Luminary material and method for manufacturing the same 失效
    照明材料及其制造方法

    公开(公告)号:US07361418B2

    公开(公告)日:2008-04-22

    申请号:US11444354

    申请日:2006-06-01

    Abstract: The present invention relates to a luminary material comprising a substrate; a luminary layer formed on a surface of the substrate; and a surface layer comprising a first portion and a second portion, wherein the first portion allows stronger light to be emitted from the luminary layer than the second portion. The luminary material according to the invention exhibits various colors, patterns and/or textures formed on the surface. Therefore, the luminary material is qualified as a decorative material in the light. A method for manufacturing the luminary material is also provided.

    Abstract translation: 本发明涉及一种包含基底的发光材料; 形成在所述基板的表面上的发光层; 以及包括第一部分和第二部分的表面层,其中所述第一部分允许比所述第二部分从所述发光体层发射更强的光。 根据本发明的发光材料表现出形成在表面上的各种颜色,图案和/或纹理。 因此,灯光材料在光线中被认为是装饰材料。 还提供了用于制造照明材料的方法。

    Single trench repair method with etched quartz for attenuated phase shifting mask
    25.
    发明授权
    Single trench repair method with etched quartz for attenuated phase shifting mask 有权
    用于衰减相移掩模的具有蚀刻石英的单沟槽修复方法

    公开(公告)号:US07157191B2

    公开(公告)日:2007-01-02

    申请号:US10755500

    申请日:2004-01-12

    Applicant: Cheng-Ming Lin

    Inventor: Cheng-Ming Lin

    CPC classification number: G03F1/32 G03F1/72

    Abstract: In accordance with the objectives of the invention a new method is provided for the repair of an attenuated phase shifting mask having a contact pattern. The invention etches a single trench in the quartz substrate of the phase shifter mask and removes the impact of a void in the phase shifter material. Alternatively, the invention provides for first conventionally restoring the original dimensions of a contact hole in which a pinhole is present and then etching a single or a double trench in the exposed substrate of the restored contact opening.

    Abstract translation: 根据本发明的目的,提供了一种用于修复具有接触图案的衰减相移掩模的新方法。 本发明蚀刻移相器掩模的石英衬底中的单个沟槽并去除移相器材料中空隙的冲击。 或者,本发明提供了首先常规地恢复其中存在针孔的接触孔的原始尺寸,然后在恢复的接触开口的暴露的基底中蚀刻单个或双沟槽。

    AlSixOy as a new bi-layer high transmittance attenuating phase shifting mask material for 193 nanometer lithography
    26.
    发明授权
    AlSixOy as a new bi-layer high transmittance attenuating phase shifting mask material for 193 nanometer lithography 失效
    AlSixOy作为193纳米光刻的新型双层高透光率衰减相移掩模材料

    公开(公告)号:US06872496B2

    公开(公告)日:2005-03-29

    申请号:US10284964

    申请日:2002-10-31

    Applicant: Cheng-Ming Lin

    Inventor: Cheng-Ming Lin

    CPC classification number: G03F1/32 G03F1/54

    Abstract: A bi-layer attenuating phase shifting film and method of forming the film are described. The bi-layer film has a first layer of AlSix1Oy1 and a second layer of AlSix2Oy2. The first layer of AlSix1Oy1 and the second layer of AlSix2Oy2 are both deposited by sputtering using a sputtering system an aluminum target, a silicon target, a source of oxygen gas, and a source of argon gas. The index of refraction, n, and the extinction coefficient, k, of the deposited films are controlled by controlling the direct current, DC, power to the aluminum target and by controlling the oxygen flow rate. The values of n and k are selected to produce a bi-layer film having a transmittance of between about 15% and 45% and good chemical stability. The phase shift of the bi-layer film is determined by the index of refraction, extinction coefficient, and thickness of each of the films.

    Abstract translation: 描述双层衰减相移膜及其形成方法。 双层膜具有第一层AlSix1Oy1和第二层AlSix2Oy2。 AlSix1Oy1的第一层和AlSix2Oy2的第二层都通过溅射系统沉积铝靶,硅靶,氧气源和氩气源。 沉积膜的折射率n和消光系数k通过控制铝靶的直流电流,直流功率和控制氧气流量来控制。 选择n和k的值以产生透光率在约15%至45%之间并具有良好化学稳定性的双层膜。 双层膜的相移取决于每个膜的折射率,消光系数和厚度。

    Method and pellicle mounting apparatus for reducing pellicle induced distortion
    27.
    发明授权
    Method and pellicle mounting apparatus for reducing pellicle induced distortion 有权
    用于减少防护薄膜引起的畸变的方法和防护薄膜安装装置

    公开(公告)号:US08792078B2

    公开(公告)日:2014-07-29

    申请号:US12767152

    申请日:2010-04-26

    CPC classification number: G03F7/70983 G03B27/58 G03F1/64 G03F7/70783

    Abstract: An apparatus for mounting a pellicle onto a mask is provided. In one embodiment, the apparatus comprises a base provided with a track; a dummy plate holder coupled to the base, the dummy plate holder for receiving a dummy plate having an elevated portion on one side thereof; a mask holder for receiving a mask, the mask holder slidably coupled to the base; a pellicle holder for receiving a pellicle frame, the pellicle holder slidably coupled to the base; and drive means being adapted to drive the pellicle holder along the track towards the dummy plate holder, wherein during operation when the pellicle frame is mounted onto the mask causing the mask to contact the dummy plate, the mounting pressure in the mask is distributed by way of the elevated portion in the dummy plate, thus reducing distortion in the mask.

    Abstract translation: 提供了一种将防护薄膜组件安装在掩模上的装置。 在一个实施例中,该装置包括设置有轨道的基座; 耦合到基座的虚拟板保持器,用于接收在其一侧具有升高部分的虚拟板的虚拟板保持器; 用于接收掩模的掩模保持器,所述掩模保持器可滑动地联接到所述基部; 用于接收防护薄膜组件框架的防护薄膜组件保持器,所述防护薄膜组件保持器可滑动地联接到所述基座; 驱动装置适于将防护薄膜组件保持器沿着轨道朝向虚拟板夹持器驱动,其中在操作期间当防护薄膜组件框架安装在掩模上使得掩模与虚拟板接触时,掩模中的安装压力被分配 的虚拟板中的升高部分,从而减少掩模中的变形。

    Mask registration correction
    28.
    发明授权
    Mask registration correction 有权
    面罩注册更正

    公开(公告)号:US08383324B2

    公开(公告)日:2013-02-26

    申请号:US11779741

    申请日:2007-07-18

    Applicant: Cheng-Ming Lin

    Inventor: Cheng-Ming Lin

    CPC classification number: G03F1/26 G03F1/00 G03F7/70433 G03F9/7003

    Abstract: A method of manufacturing a semiconductor device comprising forming an active region in a device substrate using a first phase shift mask (PSM) having a first patterned light shielding layer formed thereon, forming a polysilicon feature on the device substrate over the active region using a second PSM having a second patterned light shielding layer formed thereon, forming a contact feature on the polysilicon feature using a third PSM having a third patterned light shielding layer formed thereon, and forming a metal feature on the contact feature using a fourth PSM having a fourth patterned light shielding layer formed thereon, wherein at least one of the third and fourth patterned light shielding layers is patterned substantially similarly to at least one of the first and second patterned light shielding layers.

    Abstract translation: 一种制造半导体器件的方法,其包括:在其上形成有第一图案化遮光层的第一相移掩模(PSM)在器件衬底中形成有源区,在有源区上使用第二相位移位掩模 PSM具有形成在其上的第二图案化遮光层,使用其上形成有第三图案化遮光层的第三PSM在多晶硅特征上形成接触特征,并使用具有第四图案化遮光层的第四图案形成金属特征 形成在其上的遮光层,其中第三和第四图案化遮光层中的至少一个图案基本上类似于第一和第二图案化遮光层中的至少一个。

    Method and system for improving critical dimension proximity control of patterns on a mask or wafer
    29.
    发明授权
    Method and system for improving critical dimension proximity control of patterns on a mask or wafer 有权
    用于改善掩模或晶片上图案的临界尺寸接近度控制的方法和系统

    公开(公告)号:US07923265B2

    公开(公告)日:2011-04-12

    申请号:US11688141

    申请日:2007-03-19

    CPC classification number: G05B13/042

    Abstract: A method for improving critical dimension uniformity of a substrate is provided. An equation based on a proximity trend of a pattern on a first substrate is determined. The equation is applied in a regression model to determine a parameter value of a second substrate. A recipe of an exposure equipment is adjusted based on the parameter value for exposure of the second substrate. Also, a system for controlling critical dimension of a pattern on a substrate is provided. The system includes an advance process control system for collecting exposure data of the substrate, and a regression model within the advance process control system for analyzing the exposure data and determining a parameter value of a recipe of the exposure tool. The regression model is operable to determine an equation based on a proximity trend of the substrate.

    Abstract translation: 提供了一种改善基板的临界尺寸均匀性的方法。 确定基于第一基板上的图案的接近趋势的等式。 该方程式应用于回归模型中以确定第二衬底的参数值。 基于用于第二基板的曝光的参数值来调整曝光设备的配方。 另外,提供了一种用于控制衬底上的图案的临界尺寸的系统。 该系统包括用于收集基板的曝光数据的前进过程控制系统和用于分析曝光数据并确定曝光工具的配方的参数值的提前过程控制系统内的回归模型。 回归模型可操作以基于衬底的接近趋势来确定方程。

    PHASE-SHIFTING MASK AND METHOD OF FABRICATING SAME
    30.
    发明申请
    PHASE-SHIFTING MASK AND METHOD OF FABRICATING SAME 审中-公开
    相移掩模及其制造方法

    公开(公告)号:US20080254376A1

    公开(公告)日:2008-10-16

    申请号:US11734163

    申请日:2007-04-11

    CPC classification number: G03F1/32 G03F1/34

    Abstract: A phase-shifting mask is fabricated using two separate exposure processes. The mask includes a substrate and a device pattern area above the substrate. The mask has a mask pattern defining boundaries of the device pattern area and an administrative pattern area defining boundaries of the mask pattern.

    Abstract translation: 使用两个单独的曝光工艺制造相移掩模。 掩模包括衬底和衬底上方的器件图案区域。 掩模具有定义设备图案区域的边界的掩模图案和定义掩模图案的边界的管理图案区域。

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