Shelving system and Bracket
    25.
    发明申请

    公开(公告)号:US20190216216A1

    公开(公告)日:2019-07-18

    申请号:US16324120

    申请日:2017-08-07

    Abstract: A shelving system (11) and a bracket (10) for a shelving system comprising, the bracket (10) comprising a first end portion (19), an intermediate portion (18) and second end portion (20). The intermediate portion (18) comprises a flexible wall portion being moveable from an open position, in which the flexile wall portion is planar, to a closed position, in which the flexible wall portion is arcuate. In the closed position, the flexible wall portion can wrap around a portion of a post (14) and the first and second end portions (19, 20) engage to form a connector (32) engageable with an end of a rail (16) for supporting drawers.

    Processor
    28.
    发明申请
    Processor 有权
    处理器

    公开(公告)号:US20130019084A1

    公开(公告)日:2013-01-17

    申请号:US13498458

    申请日:2010-09-28

    CPC classification number: G06K9/74 G06F7/02 G06F2207/025

    Abstract: Apparatus (100) is provided which is arranged to accept an input data stream. In some embodiments, the apparatus (100) comprises a sampler arranged to sample the input data stream to provide k samples thereof, wherein each of the samples is n bits long and a string selector arranged to select m binary strings n bits long from at least a chosen subset of all random binary strings of a predetermined length. The apparatus (100) may further comprise a logical operator arranged to perform a logical function for each of the k samples with each of the selected binary strings to provide a vector, a memory arranged to store a matrix of the vectors generated from k samples, and an address generator arranged to generate RAM address segments from the matrix. In embodiments, the apparatus (100) may comprise a processor for, for example, pattern matching; feature detection, image recognition.

    Abstract translation: 提供了被设置为接受输入数据流的装置(100)。 在一些实施例中,装置(100)包括采样器,其被配置为对输入数据流进行采样以提供其k个采样,其中每个采样为n位长,并且串选择器布置成从至少选择n位长的m个二进制串 具有预定长度的所有随机二进制串的选定子集。 所述设备(100)还可以包括逻辑运算符,所述逻辑运算符被布置为对所选择的二进制串中的每一个为k个样本中的每一个执行逻辑函数以提供向量;布置成存储从k个样本生成的向量的矩阵的存储器, 以及布置成从矩阵生成RAM地址段的地址发生器。 在实施例中,设备(100)可以包括用于例如模式匹配的处理器; 特征检测,图像识别。

    Optical correlation apparatus
    30.
    发明授权
    Optical correlation apparatus 失效
    光学相关装置

    公开(公告)号:US08285138B2

    公开(公告)日:2012-10-09

    申请号:US12518767

    申请日:2007-12-17

    Abstract: An optical correlation apparatus is described which forms first and second parallel optical signals in response to a serial input data stream. The first parallel optical signal is arranged to have bright pulses represent binary 1 and the second parallel optical signal is arranged to have bright pulses represent binary 0. A channel select means, such as an optical switch or amplitude modulator, deselects or blocks channels in the first parallel optical signal which correspond to binary 1 in a reference data string and also deselects or blocks channels in the second parallel optical signal which correspond to binary 0 in the reference data string. The remaining optical signals are combined at one or more detectors. Where the input data matches the reference data string each bright pulse in the first and second parallel optical signals is deselected and the detector registers zero intensity. However when there is any mismatch at least one channel will pass a bright pulse to the detector. An instance of zero intensity can therefore be used as an indication of pattern match.

    Abstract translation: 描述了一种光学相关装置,其响应于串行输入数据流而形成第一和第二并行光信号。 第一并行光信号被布置成具有表示二进制1的亮脉冲,并且第二并行光信号被布置为具有表示二进制0的亮脉冲。诸如光开关或幅度调制器的通道选择装置在...中取消选择或阻止通道 第一并行光信号对应于参考数据串中的二进制1,并且还取消选择或阻止在参考数据串中对应于二进制0的第二并行光信号中的信道。 剩余的光信号在一个或多个检测器处组合。 在输入数据与参考数据串匹配的情况下,取消选择第一和第二并行光信号中的每个亮脉冲,并且检测器记录零强度。 然而,当存在任何失配时,至少一个通道将通过明亮的脉冲到检测器。 因此,零强度的实例可以用作模式匹配的指示。

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