SiC single crystals with reduced dislocation density grown by step-wise periodic perturbation technique
    21.
    发明授权
    SiC single crystals with reduced dislocation density grown by step-wise periodic perturbation technique 有权
    通过逐步周期扰动技术生长的具有降低的位错密度的SiC单晶

    公开(公告)号:US08871025B2

    公开(公告)日:2014-10-28

    申请号:US12441583

    申请日:2007-09-27

    IPC分类号: C30B28/14 C30B29/36 C30B23/00

    摘要: In a crystal growth method, a seed crystal 8 and a source material 4 are provided in spaced relation inside of a growth crucible 6. Starting conditions for the growth of a crystal 14 in the growth crucible 6 are then established therein. The starting conditions include: a suitable gas inside the growth crucible 6, a suitable pressure of the gas inside the growth crucible 6, and a suitable temperature in the growth crucible 6 that causes the source material 4 to sublimate and be transported via a temperature gradient in the growth crucible 6 to the seed crystal 8 where the sublimated source material precipitates. During growth of the crystal 14 inside the growth crucible 6, at least one of the following growth conditions are intermittently changed inside the growth crucible 6 a plurality of times: the gas in the growth crucible 6, the pressure of the gas in the growth crucible 6, and the temperature in the growth crucible 6.

    摘要翻译: 在晶体生长方法中,种子晶体8和源材料4以生长坩埚6内的间隔关系设置。然后在其中建立用于在生长坩埚6中生长晶体14的起始条件。 起始条件包括:生长坩埚6内的合适气体,生长坩埚6内部的气体的适当压力,以及生长坩埚6中适当的温度,其使得源材料4升华并经由温度梯度 在生长坩埚6中,升华的源材料析出的晶种8。 在生长坩埚6内生长晶体14期间,生长坩埚6内的至少一个以下生长条件间歇性地变化:生长坩埚6中的气体,生长坩埚中的气体压力 6,以及生长坩埚6中的温度。

    METHOD OF PREPARING CAST SILICON BY DIRECTIONAL SOLIDIFICATION
    22.
    发明申请
    METHOD OF PREPARING CAST SILICON BY DIRECTIONAL SOLIDIFICATION 审中-公开
    通过定向固化法制备硅酸钠的方法

    公开(公告)号:US20130192516A1

    公开(公告)日:2013-08-01

    申请号:US13360116

    申请日:2012-01-27

    IPC分类号: C30B19/08

    摘要: A method of preparing a silicon melt in a crucible for use in the manufacture of cast silicon, wherein the crucible comprises an opening, an opposing bottom surface, and at least one sidewall joining the opening and the bottom surface. The method comprises charging a silicon spacer to the bottom surface of the crucible; arranging a monocrystalline silicon seed crystal on the silicon spacer such that no surface of the monocrystalline silicon material is in contact with the bottom surface of the crucible; charging polycrystalline silicon feedstock to the crucible; and applying heat through at least one of the opening and the at least one sidewall in order to form a partially melted charge of silicon in the crucible.

    摘要翻译: 一种在用于制造铸硅的坩埚中制备硅熔体的方法,其中坩埚包括开口,相对的底表面和连接开口和底表面的至少一个侧壁。 该方法包括将硅隔离物装入坩埚的底表面; 在硅间隔物上布置单晶硅晶种,使得单晶硅材料的表面不与坩埚的底表面接触; 将多晶硅原料装入坩埚中; 并且通过所述开口和所述至少一个侧壁中的至少一个来施加热量,以便在所述坩埚中形成部分熔融的硅填充物。

    Novel process method of source drain spacer engineering to improve transistor capacitance
    23.
    发明申请
    Novel process method of source drain spacer engineering to improve transistor capacitance 审中-公开
    源极间隔工程的新型工艺方法,以提高晶体管电容

    公开(公告)号:US20050212041A1

    公开(公告)日:2005-09-29

    申请号:US11127941

    申请日:2005-05-11

    摘要: A method of forming an associated transistor is presented whereby short channel effects and junction capacitances are mitigated and enhanced switching speeds are thereby facilitated. Compensation regions are formed within a substrate by implanting dopants relatively deeply over source and drain regions formed within the substrate. The compensation regions are spaced apart slightly less than are the source and drain regions. This spacing affects potential contours and reduces junction capacitances within the transistor. The different distances between the source and drain regions and the compensation regions are achieved by forming and selectively adjusting sidewall spacers adjacent to a gate structure of the transistor. These spacers serve as guides for the dopants implanted into the substrate to form the source and drain regions and the compensation regions.

    摘要翻译: 提出了一种形成相关晶体管的方法,从而减轻了短沟道效应和结电容,从而促进了切换速度的提高。 通过在衬底内形成的源区和漏区相对深地注入掺杂剂,在衬底内形成补偿区。 补偿区域比源极和漏极区域稍微间隔开。 该间隔影响电位轮廓并降低晶体管内的结电容。 通过形成和选择性地调节与晶体管的栅极结构相邻的侧壁间隔来实现源极和漏极区域与补偿区域之间的不同距离。 这些间隔物用作植入衬底中的掺杂剂以形成源区和漏区以及补偿区的引导。