公开(公告)号：US20240259114A1

公开(公告)日：2024-08-01

申请号：US18101997

申请日：2023-01-26

Applicant: Keysight Technologies, Inc.

Inventor： Keith Frederick Anderson

IPC: H04B17/00 ,  H03L7/099

CPC classification number: H04B17/0085 ,  H03L7/099

Abstract: A method and system synchronize first and second VNAs for testing a DUT over a long distance. The method includes receiving at the second VNA an RF signal from the first VNA; mixing the RF signal and an LO signal at the second VNA to output an IF signal to an ADC; determining a reference error ratio between a first reference clock in the first VNA and a second reference clock in the second VNA; adjusting an LO frequency to a corrected LO frequency by applying the reference error to a desired LO frequency; mixing the RF signal and the adjusted LO signal to output the IF signal; and resampling the IF signal at an adjusted sample rate to output a corrected IF signal corrected for the reference error, without adjustments being made to the first or second reference clock.

公开(公告)号：US20240243896A1

公开(公告)日：2024-07-18

申请号：US18097047

申请日：2023-01-13

Applicant: Keysight Technologies, Inc.

Inventor： Marlin E. Viss ,  Mark Joseph Woodward

IPC: G01R31/317 ,  G01R31/319 ,  H03L7/08

CPC classification number: G01R31/31727 ,  G01R31/31919 ,  H03L7/0807

Abstract: A controller includes a memory, a processor, and a first interface to a clock recovery unit that provides a recovered clock. When executed by the processor, instructions from the memory cause the controller to: instruct, via the first interface, the clock recovery unit at a first loop bandwidth to provide the recovered clock to a signal sampler; instruct, via the first interface, the clock recovery unit at a second loop bandwidth wider than the first loop bandwidth, to provide the recovered clock to the signal sampler; compare measurements from the signal sampler at the first loop bandwidth to measurements from the signal sampler at the second loop bandwidth; and instruct, via the first interface, the clock recovery unit at a third loop bandwidth to provide the recovered clock to the signal sampler applying adjustments based on comparing the measurements.

公开(公告)号：US20240230718A9

公开(公告)日：2024-07-11

申请号：US17972297

申请日：2022-10-24

Applicant: Keysight Technologies, Inc.

Inventor： Hal Robert Paver ,  Michael Thomas McTigue

IPC: G01R1/07 ,  G01R15/22 ,  G01R19/00 ,  G01R19/252 ,  G01R31/302

CPC classification number: G01R1/071 ,  G01R15/22 ,  G01R19/0084 ,  G01R19/252 ,  G01R31/3025

Abstract: A system and method are provided for compensating for thermal drift of a probe device. The method includes monitoring a first temperature of a laser source in a sensor head that receives output electrical signals from a DUT and outputs corresponding optical signals; monitoring a second temperature of a photoreceiver in a probe interface that converts the optical signals to electrical test signals to input to the test instrument; calculating a first value of a first bias voltage using the first temperature; applying the first value of the first bias voltage to the laser source to compensate for thermal drift when the first temperature is within a first predefined temperature range; calculating a second value of a second bias voltage for the photoreceiver using the second temperature; and applying the second value of the second bias voltage to the photoreceiver to compensate for thermal drift when the second temperature is within a second predefined temperature range.

公开(公告)号：US12034626B2

公开(公告)日：2024-07-09

申请号：US17966743

申请日：2022-10-14

Applicant: Keysight Technologies, Inc.

Inventor： Razvan Ionut Stan ,  Thomas Ameling ,  Lyle Eugene Thompson

IPC: H04L43/50 ,  H04L12/54 ,  H04L43/045 ,  H04L43/0894 ,  H04L47/34 ,  H04L49/00

CPC classification number: H04L43/50 ,  H04L43/045 ,  H04L43/0894 ,  H04L49/3063 ,  H04L12/54 ,  H04L47/34

Abstract: A method for using a programmable processing pipeline to implement an application replay sequence test or a scalable CPS generation test includes obtaining a sequence replay definition code package from a sequence relay definition storage element and converting the sequence replay definition code package into a hardware configuration image. The method further includes provisioning the hardware configuration image on at least one programmable processing pipeline device, causing the at least one programmable processing pipeline device to implement a test session connection initiator and a test session receiver, and utilizing the hardware configuration image to establish a first test session connection from the test session connection initiator and the test session connection receiver through a system under test (SUT). The method also includes conducting a programmable application replay sequence test or a scalable CPS generation test through the SUT using definition information contained in the hardware configuration image.

公开(公告)号：US12025638B1

公开(公告)日：2024-07-02

申请号：US17944789

申请日：2022-09-14

Applicant: Keysight Technologies, Inc.

Inventor： David L. Gines

IPC: G01R13/02

CPC classification number: G01R13/02

Abstract: An oscilloscope includes a memory that stores instructions; and a processor that executes the instructions. When executed by the processor, the instructions cause the oscilloscope to obtain a measurement of a first radio frequency signal; perform a first Fourier transform to compute a first new spectrum based on the measurement of the first radio frequency signal; and compute a first waveform of the first new spectrum with noise of the oscilloscope reduced by performing a first inverse Fourier transform based on the first new spectrum.

公开(公告)号：US12021707B1

公开(公告)日：2024-06-25

申请号：US18122196

申请日：2023-03-16

Applicant: Keysight Technologies, Inc.

Inventor： Christian Paul Sommers ,  Kingshuk Mandal

IPC: G06F15/173 ,  H04L41/12 ,  H04L41/14 ,  H04L43/50

CPC classification number: H04L41/14 ,  H04L41/12 ,  H04L43/50

Abstract: A method for testing a link allocation (LA) implementation, the method comprising: at a test system for testing a system under test (SUT): determining at least one LA implementation parameter usable for modifying an LA implementation of the SUT; generating a test session plan for testing the SUT, wherein generating the test session plan includes determining a first plurality of test values for the at least one LA implementation parameter; and initiating, using the test session plan, a test session involving the SUT, wherein, during the test session, the test system causes the SUT to modify the LA implementation using at least one of the first plurality of test values.

公开(公告)号：US20240205129A1

公开(公告)日：2024-06-20

申请号：US18082496

申请日：2022-12-15

Applicant: Keysight Technologies, Inc.

Inventor： Christian Paul Sommers

IPC: H04L43/50 ,  H04L43/062 ,  H04L43/0817

CPC classification number: H04L43/50 ,  H04L43/062 ,  H04L43/0817

Abstract: Methods, systems, and computer readable media for a collection of distributed highly available (HA) data processing units (DPUs) in a data center. An example system includes a test packet generator configured for generating test traffic and transmitting the test traffic towards an HA DPU pair. The system includes a test controller configured for executing, while the data center is operating with live traffic, a test case and controlling the test packet generator to cause a failover test event at the HA DPU pair. The system includes a monitoring module, deployed on at least one DPU of the HA DPU pair, and configured for monitoring the HA DPU pair during the failover test event and reporting one or more metrics characterizing the failover test event to the test controller.

公开(公告)号：US20240204402A1

公开(公告)日：2024-06-20

申请号：US18084117

申请日：2022-12-19

Applicant: Keysight Technologies, Inc.

Inventor： Joel P. Dunsmore ,  Tuan Tang

IPC: H01Q3/26 ,  H01Q3/28 ,  H01Q3/38

CPC classification number: H01Q3/267 ,  H01Q3/28 ,  H01Q3/38

Abstract: An antenna array controller is configured to measure a magnitude and phase of each of a set of antenna array elements, and compensate for leakage of other elements of the set of array elements. The leakage may be compensated for by one or more mechanisms including phase cancellation by row of antenna array elements, programmatic cancellation via a single offsetting antenna array element of the antenna array elements, and deembedding array leakage by subtracting the array leakage from the measured data.

公开(公告)号：US20240171495A1

公开(公告)日：2024-05-23

申请号：US18105692

申请日：2023-02-03

Applicant: Keysight Technologies, Inc.

Inventor： Alexander Bortok ,  Thomas Ameling ,  Razvan Ionut Stan ,  Sahil Gupta

IPC: H04L43/50 ,  H04L41/14

CPC classification number: H04L43/50 ,  H04L41/145

Abstract: A method for scaling network traffic includes, at a programmable switching ASIC, receiving n traffic flows from at least one external traffic generator, n being an integer. The method further includes generating, by the programmable switching ASIC and using information from packets in the n traffic flows, m traffic flows, where m is an integer greater than n. The method further includes transmitting, by the programmable switching ASIC, the m traffic flows to a flow destination via device under test.

公开(公告)号：US20240129219A1

公开(公告)日：2024-04-18

申请号：US17966743

申请日：2022-10-14

Applicant: Keysight Technologies, Inc.

Inventor： Razvan Ionut Stan ,  Thomas Ameling ,  Lyle Eugene Thompson

IPC: H04L43/50

CPC classification number: H04L43/50

Abstract: A method for using a programmable processing pipeline to implement an application replay sequence test or a scalable CPS generation test includes obtaining a sequence replay definition code package from a sequence relay definition storage element and converting the sequence replay definition code package into a hardware configuration image. The method further includes provisioning the hardware configuration image on at least one programmable processing pipeline device, causing the at least one programmable processing pipeline device to implement a test session connection initiator and a test session receiver, and utilizing the hardware configuration image to establish a first test session connection from the test session connection initiator and the test session connection receiver through a system under test (SUT). The method also includes conducting a programmable application replay sequence test or a scalable CPS generation test through the SUT using definition information contained in the hardware configuration image.