公开(公告)号：US07402981B2

公开(公告)日：2008-07-22

申请号：US10675116

申请日：2003-09-30

Applicant: Marcus W. May ,  Matthew D. Felder

Inventor： Marcus W. May ,  Matthew D. Felder

IPC: H01M10/46

CPC classification number: H02J7/0065 ,  H02J7/0068

Abstract: A battery converter, which is used to convert battery voltage to an output voltage to power an integrated circuit in a battery-operated mode, is placed into a battery-charge mode to charge the battery when external power source is present to power the integrated circuit and the battery needs charging.

Abstract translation: 将用于将电池电压转换为对电池供电模式的集成电路供电的电池转换器被置于电池充电模式，以在外部电源存在时向集成电路供电 电池需要充电。

公开(公告)号：US20080100488A1

公开(公告)日：2008-05-01

申请号：US11796968

申请日：2007-04-30

Applicant: Matthew D. Felder ,  Charles Eric Seaberg

Inventor： Matthew D. Felder ,  Charles Eric Seaberg

IPC: H03M1/66

CPC classification number: H04R5/04 ,  H04R2430/01 ,  H04R2499/11

Abstract: An audio output circuit includes a DAC module, a line out circuit, and a headphone amplifier circuit. The digital to analog conversion (DAC) module is coupled to convert an audio component of digitized multimedia data into an analog audio signal. The line out circuit is coupled to amplify the analog audio signal based on a line out volume setting. The headphone amplifier is coupled to amplify the analog audio signal based on a volume setting to produce an amplified analog audio signal.

Abstract translation: 音频输出电路包括DAC模块，线路输出电路和耳机放大器电路。 数模转换（DAC）模块被耦合以将数字化多媒体数据的音频分量转换为模拟音频信号。 线路输出电路被耦合以基于线路输出音量设置来放大模拟音频信号。 耳机放大器被耦合以基于音量设置放大模拟音频信号以产生放大的模拟音频信号。

公开(公告)号：US07254244B2

公开(公告)日：2007-08-07

申请号：US10628827

申请日：2003-07-28

Applicant: Matthew Brady Henson ,  Matthew D. Felder

Inventor： Matthew Brady Henson ,  Matthew D. Felder

IPC: H03F21/00 ,  H03F1/14 ,  H03F1/26 ,  H04B15/00 ,  H03G3/10

CPC classification number: H03F1/305 ,  H03F2200/331 ,  H03G3/348

Abstract: An audio amplifier generates an output to a load, in which a digital-to-analog converter drives the amplifier during powering up and powering down the amplifier. The digital-to-analog converter controls the amplifier to ramp the voltage at the output at a predetermined rate to reduce rapid voltage changes from being sent to the load during the powering up or powering down sequence.

Abstract translation: 音频放大器产生一个负载的输出，其中数模转换器在上电和上电放大器期间驱动放大器。 数模转换器控制放大器以预定速率斜坡输出输出端的电压，以减少快速电压变化，从而在上电或掉电过程中发送到负载。

公开(公告)号：US07245247B1

公开(公告)日：2007-07-17

申请号：US11355934

申请日：2006-02-16

Applicant: Michael R. May ,  Matthew D. Felder

Inventor： Michael R. May ,  Matthew D. Felder

IPC: H03M3/00

CPC classification number: H03M3/496 ,  G11C27/024 ,  H03M3/454

Abstract: An analog-to-digital converter (ADC) includes a modulator and a decimation filter. The modulator includes a sampling circuit, integrator, a quantizer, and feedback circuitry. The sampling circuit includes at least one sampling capacitor and a plurality of dump capacitors. A sum of the capacitance of the dump capacitors is substantially equal to a capacitance of the sampling capacitors. Combined sampling/dump capacitors having approximately equal capacitance may be used with the sampling circuit.

Abstract translation: 模数转换器（ADC）包括调制器和抽取滤波器。 调制器包括采样电路，积分器，量化器和反馈电路。 采样电路包括至少一个采样电容器和多个转储电容器。 转储电容器的电容之和基本上等于采样电容器的电容。 采样电路可以使用具有大致相等电容的组合采样/去电容器。

公开(公告)号：US06967468B2

公开(公告)日：2005-11-22

申请号：US10675101

申请日：2003-09-30

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H02J7/00

CPC classification number: H02J7/0031

Abstract: An overvoltage and backflow current protection circuit is employed when charging a battery. A switching circuit controls bias to the protection circuit to switch between overvoltage protection and backflow current protection.

公开(公告)号：US08861749B2

公开(公告)日：2014-10-14

申请号：US13114655

申请日：2011-05-24

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03F21/00 ,  H04H60/04 ,  G06F3/16 ,  G10L21/0208 ,  H04B1/10

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

公开(公告)号：US20110222712A1

公开(公告)日：2011-09-15

申请号：US13114655

申请日：2011-05-24

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H03F99/00 ,  H03G3/00 ,  H03F1/56 ,  H03G3/20

CPC classification number: H04H60/04 ,  G06F3/162 ,  G10L21/0208 ,  H04B1/1036

Abstract: An audio output circuit includes an on-chip left channel amplifier module, an on-chip center channel amplifier module, and an on-chip right channel amplifier module. A left channel IC pin is operably coupled to an output of the on-chip left channel amplifier module. A right channel IC pin is operably coupled to an output of the on-chip right channel amplifier module. A center channel IC pin is operably coupled to an output of the on-chip center channel amplifier module. A center channel feedback IC pin is operably coupled to an input of the on-chip center channel amplifier module to provide a feedback loop. A left jack connection is operably coupled to the left channel IC pin. A right jack connection is operably coupled to the right channel IC pin. A jack return connection coupled to the center feedback IC pin. An inductor has a first node coupled to the jack return connection and a second node coupled to the center channel IC pin.

Abstract translation: 音频输出电路包括片上左声道放大器模块，片上中心声道放大器模块和片上右声道放大器模块。 左通道IC引脚可操作地耦合到片上左声道放大器模块的输出。 右通道IC引脚可操作地耦合到片上右声道放大器模块的输出。 中心通道IC引脚可操作地耦合到片上中心通道放大器模块的输出端。 中心通道反馈IC引脚可操作地耦合到片上中心通道放大器模块的输入端以提供反馈回路。 左插孔连接可操作地耦合到左通道IC引脚。 右插孔连接可操作地耦合到右通道IC引脚。 耦合到中心反馈IC引脚的插座返回连接。 电感器具有耦合到插座返回连接的第一节点和耦合到中心通道IC引脚的第二节点。

公开(公告)号：US07876911B2

公开(公告)日：2011-01-25

申请号：US11389780

申请日：2006-03-27

Applicant: Matthew D. Felder ,  Matthew Brady Henson

Inventor： Matthew D. Felder ,  Matthew Brady Henson

IPC: H04R1/10

CPC classification number: H04R3/04

Abstract: A headphone driver includes a driver module for generating a plurality of headphone driver signals including a filtered stereo sum signal.

Abstract translation: 耳机驱动器包括用于产生包括滤波后的立体声和信号的多个耳机驱动器信号的驱动器模块。

公开(公告)号：US07602862B2

公开(公告)日：2009-10-13

申请号：US11237344

申请日：2005-09-28

Applicant: Michael R. May ,  Matthew D. Felder

Inventor： Michael R. May ,  Matthew D. Felder

IPC: H03D3/00 ,  H03K9/06 ,  H03K9/00

CPC classification number: H03D3/007

Abstract: A mixing module includes a plurality of switched sample modules operably for generating a corresponding plurality of samples of an analog input signal in response to a control signal. A control module generates a mixing sequence and a control signal based on the mixing sequence, the control signal including a sequence of sample positions at a sampling clock rate and a sequence of scale factors, the sequence of scale factors based on an oscillation, wherein the sampling clock has a sample period and wherein the sequence of sample positions repeats at a sample position period greater than a sample interval, the sample interval equal to the sample period times the number of the plurality of switched sample circuits.

Abstract translation: 混合模块包括可操作地用于响应于控制信号产生模拟输入信号的相应多个样本的多个切换采样模块。 控制模块基于混合序列产生混合序列和控制信号，该控制信号包括采样时钟速率的采样位置序列和比例因子序列，基于振荡的比例因子序列，其中， 采样时钟具有采样周期，其中采样位置序列在大于采样间隔的采样位置周期重复，采样间隔等于采样周期乘以多个开关采样电路的数量。

公开(公告)号：US07580671B2

公开(公告)日：2009-08-25

申请号：US11415826

申请日：2006-05-02

Applicant: Matthew D. Felder

Inventor： Matthew D. Felder

IPC: H04H60/09 ,  H04B1/18

CPC classification number: H04H60/27 ,  G11B27/034 ,  G11B27/105 ,  G11B27/28 ,  G11B27/329 ,  H04H60/43 ,  H04H60/74 ,  H04H2201/13 ,  H04N21/4126

Abstract: A radio record module includes a radio data system (RDS) decoder module that decodes a received RDS signal, that has an associated audio signal, into received RDS data. A memory module stores a record request, the record request having an RDS parameter. A comparison module compares the received RDS data to the RDS parameter of the record request and asserts a record signal when the received RDS data compares favorably to the RDS parameter. A recording module records the associated audio signal in response to the record signal being asserted.

Abstract translation: 无线电记录模块包括无线电数据系统（RDS）解码器模块，其将具有相关音频信号的接收的RDS信号解码为接收的RDS数据。 存储器模块存储记录请求，记录请求具有RDS参数。 比较模块将接收到的RDS数据与记录请求的RDS参数进行比较，并且当接收到的RDS数据与RDS参数相比有利时，它将断言记录信号。 记录模块响应于断言的记录信号来记录相关联的音频信号。