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公开(公告)号：US20090102562A1
公开(公告)日：2009-04-23
申请号：US11874305
申请日：2007-10-18
Applicant: Yuyu Chang , Hooman Darabi
Inventor： Yuyu Chang , Hooman Darabi
CPC classification number: H03F3/45188 , H03F3/195 , H03F2200/294 , H03F2200/451 , H03F2203/45384 , H03F2203/45386 , H03F2203/45392 , H03F2203/45544 , H03F2203/45548 , H03F2203/45554 , H03F2203/45596 , H03F2203/45638 , H04B1/18
Abstract: Cross-coupled low noise amplifier for cellular applications. A circuitry implementation that includes two pairs of metal oxide semiconductor field-effect transistors (MOSFETs) (either N-type of P-type) operates as an LNA, which can be used within any of a wide variety of communication devices. In one embodiment, this design is particularly adaptable to cellular telephone applications. A majority of the elements are integrated within the design and need not be implemented off-chip, and this can provide for a reduction in area required by the circuitry. A very high output impedance is provided by using two transistors (implemented in a triple well configuration) with resistive source degeneration. A higher than typical power supply voltage can be employed (if desired) to accommodate the voltage drops of the resistors and transistors.
Abstract translation: 用于蜂窝应用的交叉耦合低噪声放大器。 包括两对金属氧化物半导体场效应晶体管（MOSFET）（N型P型）的电路实现作为LNA工作，可以在各种通信设备中使用。 在一个实施例中，该设计特别适用于蜂窝电话应用。 大多数元件集成在设计中，不需要在片外实现，这可以减少电路所需的面积。 通过使用具有电阻源退化的两个晶体管（以三阱配置实现）来提供非常高的输出阻抗。 可以使用高于典型的电源电压（如果需要）以适应电阻器和晶体管的电压降。
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公开(公告)号：US07224225B2
公开(公告)日：2007-05-29
申请号：US11115698
申请日：2005-04-26
Applicant: Yuyu Chang
Inventor： Yuyu Chang
IPC: H03F3/45
CPC classification number: H03F3/193 , H03F3/45188 , H03F2200/294 , H03F2203/45386 , H03F2203/45621 , H03F2203/45731
Abstract: An embodiment of the present invention is a low noise amplifier using differential inductors. An input matching circuit having first and second differential inductors matches an input resistance at an input having input terminals. A differential amplifier circuit converts the input voltage a current. An output circuit provides an output voltage buffer with a low output impedance at an output having output terminals. A cascode circuit increases isolation between the input and the output terminals.
Abstract translation: 本发明的一个实施例是使用差分电感器的低噪声放大器。 具有第一和第二差分电感器的输入匹配电路匹配具有输入端的输入端的输入电阻。 差分放大器电路将输入电压转换为电流。 输出电路在具有输出端的输出端提供具有低输出阻抗的输出电压缓冲器。 共源共栅电路增加了输入端和输出端之间的隔离度。
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公开(公告)号：US20060238248A1
公开(公告)日：2006-10-26
申请号：US11115698
申请日：2005-04-26
Applicant: Yuyu Chang
Inventor： Yuyu Chang
IPC: H03F3/45
CPC classification number: H03F3/193 , H03F3/45188 , H03F2200/294 , H03F2203/45386 , H03F2203/45621 , H03F2203/45731
Abstract: An embodiment of the present invention is a low noise amplifier using differential inductors. An input matching circuit having first and second differential inductors matches an input resistance at an input having input terminals. A differential amplifier circuit converts the input voltage a current. An output circuit provides an output voltage buffer with a low output impedance at an output having output terminals. A cascode circuit increases isolation between the input and the output terminals.
Abstract translation: 本发明的一个实施例是使用差分电感器的低噪声放大器。 具有第一和第二差分电感器的输入匹配电路匹配具有输入端的输入端的输入电阻。 差分放大器电路将输入电压转换为电流。 输出电路在具有输出端的输出端提供具有低输出阻抗的输出电压缓冲器。 共源共栅电路增加了输入端和输出端之间的隔离度。
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24.发明授权公开(公告)号：US09112508B2
公开(公告)日：2015-08-18
申请号：US12802604
申请日：2010-06-09
Applicant: Yuyu Chang , Ahmad Yazdi , Hooman Darabi
Inventor： Yuyu Chang , Ahmad Yazdi , Hooman Darabi
IPC: H03L1/00
CPC classification number: H03L1/00
Abstract: According to one embodiment, a radio frequency (RF) transceiver includes a local oscillator generator (LOGEN) circuit configured to receive an adaptive supply voltage. The LOGEN circuit is coupled to a variable power supply for providing the adaptive supply voltage. A process monitor for the LOGEN circuit is in communication with the variable power supply through a power supply programming module. As a result, the adaptive supply voltage can be adjusted according to data supplied by the process monitor. A method for adaptively powering a LOGEN circuit comprises providing power to an RF device, monitoring a process corner of said LOGEN circuit, determining a supply voltage corresponding to the process corner, and adjusting the supply voltage to adaptively power the LOGEN circuit.
Abstract translation: 根据一个实施例，射频（RF）收发器包括被配置为接收自适应电源电压的本地振荡器发生器（LOGEN）电路。 LOGEN电路耦合到可变电源以提供自适应电源电压。 LOGEN电路的过程监控器通过电源编程模块与可变电源通信。 因此，可以根据过程监视器提供的数据来调节自适应电源电压。 一种用于自适应地为LOGEN电路供电的方法包括向RF设备提供电力，监测所述LOGEN电路的过程角，确定对应于过程角的电源电压，以及调整电源电压以自适应地为LOGEN电路供电。
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公开(公告)号：US08204468B2
公开(公告)日：2012-06-19
申请号：US12496325
申请日：2009-07-01
Applicant: Yuyu Chang , Hooman Darabi
Inventor： Yuyu Chang , Hooman Darabi
IPC: H04B1/26
CPC classification number: G05F3/242
Abstract: Embodiments of the present invention provide DC biasing circuits. Embodiments employ an open loop scheme, instead of a closed loop scheme as used in conventional circuits. In addition, embodiments generate a DC bias voltage that is independent of temperature, process, and power supply variations. Further, embodiments require low amounts of power and silicon.
Abstract translation: 本发明的实施例提供直流偏置电路。 实施例采用开环方案，而不是常规电路中使用的闭环方案。 此外，实施例产生独立于温度，过程和电源变化的DC偏置电压。 此外，实施例需要少量的功率和硅。
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Patent Agency Ranking
公开(公告)号：US08183905B2
公开(公告)日：2012-05-22
申请号：US12539495
申请日：2009-08-11
Applicant: Yuyu Chang , Qiang Li , John Leete , Hooman Darabi , Yiannis Kokolakis
Inventor： Yuyu Chang , Qiang Li , John Leete , Hooman Darabi , Yiannis Kokolakis
Abstract: A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.
Abstract translation: 本文描述了提供低功率时钟信号或低噪声时钟信号的方法。 确定是否使用低功率模式或低噪声模式。 低压差稳压器（LDO）的基准输入电压切换为低功耗模式的低功耗电压基准电压，低噪声电压基准输入低噪声电压基准电压。 LDO为晶体振荡器提供恒定电压输出。 使用晶体振荡器产生时钟信号。 使用低功率限幅器来限制时钟信号以产生低功率输出时钟信号和/或使用低噪声限制器来限制以产生低噪声时钟信号。 使用多路复用器选择低功耗输出时钟信号或低噪声输出时钟信号。
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27.发明申请公开(公告)号：US20110306311A1
公开(公告)日：2011-12-15
申请号：US12802604
申请日：2010-06-09
Applicant: Yuyu Chang , Ahmad Yazdi , Hooman Darabi
Inventor： Yuyu Chang , Ahmad Yazdi , Hooman Darabi
IPC: H04B1/40
CPC classification number: H03L1/00
Abstract: According to one embodiment, a radio frequency (RF) transceiver includes a local oscillator generator (LOGEN) circuit configured to receive an adaptive supply voltage. The LOGEN circuit is coupled to a variable power supply for providing the adaptive supply voltage. A process monitor for the LOGEN circuit is in communication with the variable power supply through a power supply programming module. As a result, the adaptive supply voltage can be adjusted according to data supplied by the process monitor. A method for adaptively powering a LOGEN circuit comprises providing power to an RF device, monitoring a process corner of said LOGEN circuit, determining a supply voltage corresponding to the process corner, and adjusting the supply voltage to adaptively power the LOGEN circuit.
Abstract translation: 根据一个实施例，射频（RF）收发器包括被配置为接收自适应电源电压的本地振荡器发生器（LOGEN）电路。 LOGEN电路耦合到可变电源以提供自适应电源电压。 LOGEN电路的过程监控器通过电源编程模块与可变电源通信。 因此，可以根据过程监视器提供的数据来调节自适应电源电压。 一种用于自适应地为LOGEN电路供电的方法包括向RF设备提供电力，监测所述LOGEN电路的过程角，确定对应于过程角的电源电压，以及调整电源电压以自适应地为LOGEN电路供电。
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公开(公告)号：US20110003574A1
公开(公告)日：2011-01-06
申请号：US12496325
申请日：2009-07-01
Applicant: Yuyu CHANG , Hooman DARABI
Inventor： Yuyu CHANG , Hooman DARABI
CPC classification number: G05F3/242
Abstract: Embodiments of the present invention provide constant output DC biasing circuits. Embodiments employ an open loop scheme, instead of a closed loop scheme as used in conventional circuits. In addition, embodiments generate a DC bias voltage that is independent of temperature, process, and power supply variations. Further, embodiments require low amounts of power and silicon.
Abstract translation: 本发明的实施例提供恒定的输出DC偏置电路。 实施例采用开环方案，而不是常规电路中使用的闭环方案。 此外，实施例产生独立于温度，过程和电源变化的DC偏置电压。 此外，实施例需要少量的功率和硅。
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29.发明申请公开(公告)号：US20110002257A1
公开(公告)日：2011-01-06
申请号：US12882684
申请日：2010-09-15
Applicant: Arya Behzad , Adedayo Ojo , Yuyu Chang , Hung-Ming Chien , Kishore Rama Rao , Guruprasad Seetharam
Inventor： Arya Behzad , Adedayo Ojo , Yuyu Chang , Hung-Ming Chien , Kishore Rama Rao , Guruprasad Seetharam
CPC classification number: H04B1/06 , H04B1/0057 , H04B1/0082 , H04B7/084
Abstract: Aspects of a method and system for processing signals in a high performance receive chain may include amplifying a plurality of radio frequency signals in one or more respective one or ones of a plurality of amplifier chains in a multistandard radio frequency front-end, which may comprise one or more shared processing stages. The plurality of radio frequency signals may be compliant with a plurality of radio frequency communication standards and may be received concurrently. The one or more shared processing stages may be shared between two or more of the plurality of amplifier chains. Each of the two or more of the plurality of amplifier chains may be operable to amplify signals compliant with different radio frequency communication standards.
Abstract translation: 用于处理高性能接收链中的信号的方法和系统的方面可以包括在多标准射频前端中的多个放大器链中的一个或多个相应的一个或多个放大器链中放大多个射频信号，其可以包括 一个或多个共享处理阶段。 多个射频信号可以符合多个射频通信标准，并且可以同时接收。 一个或多个共享处理级可以在多个放大器链中的两个或更多个之间共享。 多个放大器链中的两个或更多个放大器链中的每一个可以可操作以放大符合不同射频通信标准的信号。
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公开(公告)号：US20100039194A1
公开(公告)日：2010-02-18
申请号：US12241103
申请日：2008-09-30
Applicant: Hooman Darabi , Yuyu Chang , Zhimin Zhou , Morteza Vadipour
Inventor： Hooman Darabi , Yuyu Chang , Zhimin Zhou , Morteza Vadipour
IPC: H03J3/20
CPC classification number: H03L1/00 , H03B5/364 , H03B2201/0291 , H03J2200/10
Abstract: A frequency tuning device for use in a crystal oscillator circuit includes a first fine tuning array of capacitors, a second fine tuning array of capacitors and a coarse tuning array of capacitors coupled in parallel to produce a tuning capacitance for tuning the crystal oscillator. The first fine tuning array of capacitors includes a binary weighted switched capacitor network, the second fine tuning array of capacitors includes a thermometer coded switched capacitor network and the coarse tuning array of capacitors includes a binary weighted switched capacitor network with a different unit capacitance value than the first and second fine tuning arrays.
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