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    Gain control circuit and method capable of easing leakage current influence
    3.
    发明授权
    Gain control circuit and method capable of easing leakage current influence 有权
    增益控制电路和方法能够缓解漏电流的影响

    公开(公告)号：US09287841B2

    公开(公告)日：2016-03-15

    申请号：US14334498

    申请日：2014-07-17

    申请人： REALTEK SEMICONDUCTOR CORPORATION

    发明人： Ming-Cheng Chiang ,  Yuan-Ping Hsu ,  Li-Lung Kao

    IPC分类号： H03G3/20 ,  H03G1/00 ,  H03F3/45

    CPC分类号： H03G1/0023 ,  H03F3/45475 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45596 ,  H03F2203/45616 ,  H03G1/0088 ,  H03G3/20

    摘要： The present invention discloses a gain control circuit capable of easing leakage current influence. According to an embodiment of the present invention, the gain control circuit comprises: at least one signal input end for receiving at least one input signal; a signal output end for outputting an output signal; an amplifier coupled between an amplifier input end and the signal output end; and a plurality of gain schemes. Each of the gain schemes is set between the at least one signal input end and the signal output end; and when one of the gain schemes is activated to generate the output signal, the rest gain schemes are inactivated to stop gain production and concurrently discharge leakage currents through their respective grounding paths.

    摘要翻译： 本发明公开了一种能够缓解漏电流影响的增益控制电路。 根据本发明的实施例，增益控制电路包括：用于接收至少一个输入信号的至少一个信号输入端; 用于输出输出信号的信号输出端; 耦合在放大器输入端和信号输出端之间的放大器; 和多个增益方案。 每个增益方案被设置在至少一个信号输入端和信号输出端之间; 并且当其中一个增益方案被激活以产生输出信号时，其余的增益方案被停用以停止增益产生并同时通过它们各自的接地路径泄漏泄漏电流。

    Integrated circuits and methods for enabling high-speed AC-coupled networks to suppress noise during low-frequency operation
    5.
    发明授权
    Integrated circuits and methods for enabling high-speed AC-coupled networks to suppress noise during low-frequency operation 失效
    用于使高速交流耦合网络在低频操作期间抑制噪声的集成电路和方法

    公开(公告)号：US08035438B2

    公开(公告)日：2011-10-11

    申请号：US12467259

    申请日：2009-05-16

    申请人： Gerald Lee Esch, Jr.

    发明人： Gerald Lee Esch, Jr.

    IPC分类号： H03L5/00

    CPC分类号： H03F1/52 ,  H03F3/45475 ,  H03F2203/45536 ,  H03F2203/45541 ,  H03F2203/45542 ,  H03F2203/45561 ,  H03F2203/45591 ,  H03F2203/45594 ,  H03F2203/45596

    摘要： An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage.

    摘要翻译： 交流（AC）耦合集成电路（IC）抑制由稳态输入信号引入的信号误差。 IC包括运算放大器，真正的直流（DC）偏置网络，互补的DC偏置网络以及第一和第二反馈元件。 运算放大器具有反相输入，非反相输入和输出。 真正的DC偏置网络具有彼此耦合的第一和第二分支和非反相输入。 互补DC偏置网络具有彼此耦合的第三和第四分支和反相输入。 第一和第二反馈元件响应于真实输入信号和互补输入信号之一的特性产生第一和第二控制信号。 控制信号可防止运算放大器输入端的电压达到等效的稳态直流偏置电压。

    INTEGRATED CIRCUITS AND METHODS FOR ENABLING HIGH-SPEED AC-COUPLED NETWORKS TO SUPPRESS NOISE DURING LOW-FREQUENCY OPERATION
    6.
    发明申请
    INTEGRATED CIRCUITS AND METHODS FOR ENABLING HIGH-SPEED AC-COUPLED NETWORKS TO SUPPRESS NOISE DURING LOW-FREQUENCY OPERATION 失效
    一体化电路和方法，用于在低频操作期间实现高速交流耦合网络以抑制噪声

    公开(公告)号：US20100289565A1

    公开(公告)日：2010-11-18

    申请号：US12467259

    申请日：2009-05-16

    申请人： Gerald Lee Esch, JR.

    发明人： Gerald Lee Esch, JR.

    IPC分类号： H03F1/00

    CPC分类号： H03F1/52 ,  H03F3/45475 ,  H03F2203/45536 ,  H03F2203/45541 ,  H03F2203/45542 ,  H03F2203/45561 ,  H03F2203/45591 ,  H03F2203/45594 ,  H03F2203/45596

    摘要： An alternating-current (AC) coupling integrated circuit (IC) suppresses signal errors introduced by a steady-state input signal. The IC includes an operational amplifier, a true direct-current (DC) bias network, a complimentary DC-bias network and first and second feedback elements. The operational amplifier has an inverting input, a non-inverting input and an output. The true DC-bias network has first and second branches that are coupled to one another and the non-inverting input. The complimentary DC-bias network has third and fourth branches that are coupled to one another and the inverting input. First and second feedback elements generate first and second control signals in response to a characteristic of one of the true input signal and the complimentary input signal. The control signals prevent the voltage at the inputs to the operational amplifier from reaching an equivalent, steady-state, DC-bias voltage.

    摘要翻译： 交流（AC）耦合集成电路（IC）抑制由稳态输入信号引入的信号误差。 IC包括运算放大器，真正的直流（DC）偏置网络，互补的DC偏置网络以及第一和第二反馈元件。 运算放大器具有反相输入，非反相输入和输出。 真正的DC偏置网络具有彼此耦合的第一和第二分支和非反相输入。 互补DC偏置网络具有彼此耦合的第三和第四分支和反相输入。 第一和第二反馈元件响应于真实输入信号和互补输入信号之一的特性产生第一和第二控制信号。 控制信号可防止运算放大器输入端的电压达到等效的稳态直流偏置电压。

    AUTOMATIC GAIN CONTROL
    7.
    发明申请
    AUTOMATIC GAIN CONTROL 有权
    自动增益控制

    公开(公告)号：US20100231299A1

    公开(公告)日：2010-09-16

    申请号：US12400898

    申请日：2009-03-10

    申请人： Zhengyu Wang ,  Xiaoju Wu

    发明人： Zhengyu Wang ,  Xiaoju Wu

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45475 ,  H03F3/45179 ,  H03F3/45659 ,  H03F2200/411 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45528 ,  H03F2203/45536 ,  H03F2203/45594 ,  H03F2203/45596 ,  H03F2203/45652 ,  H03G1/0029 ,  H03G1/0088

    摘要： A method and system for providing automatic gain control for a differential amplifier are provided. An impedance network is set to have a first impedance that corresponds to a first gain for a differential amplifier, which amplifies an input signal by the first gain. Once the amplified input signal is greater than a first threshold voltage, the impedance network is set to have a second impedance that corresponds to a second gain for the differential amplifier, which amplifies the input signal. Once amplified input signal is greater than a second threshold voltage and a predetermined period has lapsed, the impedance network is reset to have the first impedance that corresponds to a first gain for the differential amplifier.

    摘要翻译： 提供了一种用于为差分放大器提供自动增益控制的方法和系统。 阻抗网络被设置为具有对应于差分放大器的第一增益的第一阻抗，该差分放大器通过第一增益来放大输入信号。 一旦放大的输入信号大于第一阈值电压，阻抗网络被设置为具有对应于放大输入信号的差分放大器的第二增益的第二阻抗。 一旦放大输入信号大于第二阈值电压并且预定周期已经过去，则阻抗网络被复位为具有对应于差分放大器的第一增益的第一阻抗。

    TRANSCONDUCTOR AND MIXER WITH HIGH LINEARITY
    8.
    发明申请
    TRANSCONDUCTOR AND MIXER WITH HIGH LINEARITY 审中-公开
    具有高线性度的TRANSCONDUCTOR AND MIXER

    公开(公告)号：US20080284489A1

    公开(公告)日：2008-11-20

    申请号：US11748014

    申请日：2007-05-14

    申请人： Eng Chuan Low

    发明人： Eng Chuan Low

    IPC分类号： H03F3/189

    CPC分类号： H03F1/3211 ,  H03D7/1441 ,  H03D7/145 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0084 ,  H03F3/45197 ,  H03F2203/45326 ,  H03F2203/45364 ,  H03F2203/45596

    摘要： A transconductor. The transconductor comprises first and second active device networks. The first active device network has a first node and a second node and comprises a first MOS transistor having a gate, a source coupled to the first node, and a drain coupled to the second node. The second active device network has a first node and a second node respectively connected to the first and second nodes of the first active device network and comprises a second MOS transistor and a voltage drop generator. The second MOS transistor has a gate and a source respectively connected to the gate and the source of the first MOS transistor. The voltage drop generator is coupled between a drain of the second MOS transistor and the second nodes of the first and second active device networks and generates a voltage drop across the same.

    摘要翻译： 跨导体。 跨导体包括第一和第二有源器件网络。 第一有源器件网络具有第一节点和第二节点，并且包括具有栅极的第一MOS晶体管，耦合到第一节点的源极和耦合到第二节点的漏极。 第二有源器件网络具有分别连接到第一有源器件网络的第一和第二节点的第一节点和第二节点，并且包括第二MOS晶体管和电压降发生器。 第二MOS晶体管具有分别连接到第一MOS晶体管的栅极和源极的栅极和源极。 电压降发生器耦合在第二MOS晶体管的漏极和第一和第二有源器件网络的第二节点之间，并在其上产生一个电压降。

    Ultra wide band, differential input/output, high frequency amplifier in an integrated circuit
    9.
    发明授权
    Ultra wide band, differential input/output, high frequency amplifier in an integrated circuit 有权
    超宽带，差分输入/输出，集成电路中的高频放大器

    公开(公告)号：US07400196B2

    公开(公告)日：2008-07-15

    申请号：US11504431

    申请日：2006-08-15

    申请人： Michael A. Wyatt

    发明人： Michael A. Wyatt

    IPC分类号： H03F3/18

    CPC分类号： H03F3/195 ,  H03F1/42 ,  H03F3/45085 ,  H03F3/45475 ,  H03F3/45497 ,  H03F3/45941 ,  H03F2200/36 ,  H03F2203/45178 ,  H03F2203/45352 ,  H03F2203/45418 ,  H03F2203/45434 ,  H03F2203/45576 ,  H03F2203/45596 ,  H03F2203/45601 ,  H03F2203/45622 ,  H03F2203/45638 ,  H03F2203/45696

    摘要： A wide band amplifier includes a core amplifier having input terminals and output terminals for, respectively, receiving differential input signals and providing amplified differential output signals. A bandwidth peaking network is coupled to the core amplifier and includes (a) a first coil and a first resistor connected in series and (b) a second coil and a second resistor connected in series. The first coil and resistor and the second coil and resistor, respectively, are coupled to the core amplifier for receiving the amplified differential output signals. The bandwidth peaking network is configured to increase the frequency bandwidth of the amplifier. The bandwidth peaking network includes (a) a first node formed between the first coil and resistor, (b) a second node formed between the second coil and resistor, and (c) a third resistor is connected between the first node and the second node. This resistor is free of current flow at low frequency operation of the amplifier.

    摘要翻译： 宽带放大器包括具有输入端的核心放大器和用于分别接收差分输入信号并提供放大的差分输出信号的输出端。 带宽峰化网络耦合到核心放大器，并且包括（a）串联连接的第一线圈和第一电阻器，以及串联连接的第二线圈和第二电阻器。 第一线圈和电阻器以及第二线圈和电阻器分别耦合到核心放大器以接收放大的差分输出信号。 带宽峰化网络被配置为增加放大器的频率带宽。 带宽峰化网络包括（a）形成在第一线圈和电阻器之间的第一节点，（b）形成在第二线圈和电阻器之间的第二节点，以及（c）第三电阻器连接在第一节点和第二节点之间 。 该放大器的低频工作时，该电阻没有电流流动。