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    Linear voltage controlled oscillator transconductor with gain compensation
    1.
    发明授权
    Linear voltage controlled oscillator transconductor with gain compensation 有权

    公开(公告)号：US06466100B2

    公开(公告)日：2002-10-15

    申请号：US09757107

    申请日：2001-01-08

    Applicant: Allan L. Mullgrav, Jr. ,  Michael A. Sorna

    Inventor： Allan L. Mullgrav, Jr. ,  Michael A. Sorna

    IPC: H03B524

    CPC classification number: H03L7/0995 ,  H03B2201/0291 ,  H03L7/0891 ,  H03L7/093

    Abstract: A voltage controlled oscillator of a phase locked loop circuit having digitally controlled gain compensation. The digital control circuitry provides binary logic input to the voltage controlled oscillator for a digitally controlled variable resistance circuit, a digitally controlled variable current transconductor circuit, or differential transistor pairs having mirrored circuitry for adjusting the V-I gain. The latter configuration requires the voltage controlled oscillator to incorporate a source-coupled differential pair which is driven by a low pass filter capacitor output voltage, and connected to load transistors; a current source and a current mirror for generating a tail current; individual banks of transistors to mirror the load transistor currents; a digital-to-analog converter with control lines outputted there from, the digital-to-analog converter used to increase the amount of current allowed to flow to the transconductor output, the current being digitally increased and decreased corresponding to an amount of current pulled from the current source, and mirroring the current through at least one transistor mirror circuit.

    Varactor with extended tuning range
    4.
    发明申请
    Varactor with extended tuning range 有权
    变幅器具有扩展调谐范围

    公开(公告)号：US20040147237A1

    公开(公告)日：2004-07-29

    申请号：US10601815

    申请日：2003-06-23

    Inventor： Wolfgang Franz Eckl ,  Georg Fischer ,  Gerhard Kaminski

    IPC: H04B001/18

    CPC classification number: H03F3/195 ,  H03B5/1203 ,  H03B5/1243 ,  H03B2201/0208 ,  H03B2201/0291 ,  H03F2200/111 ,  H03J3/185 ,  H03J2200/10

    Abstract: The invention proposes a device for high-frequency and/or radio-frequency tuning comprising within one IC-package a first variable capacitor (C1) and at least one second capacitor (C2), each of the at least one second capacitor (C2) being fixed or variable respectively, at least one signal path connected to the first variable capacitor (C1) and providing at least one input and one output port (rf-port1, rf-port2) and at least one controllable switching means (SC2) for individually connecting and disconnecting at least one of the at least one second capacitor (C2) into the signal path or from the signal path, in particular in parallel to the first variable capacitor (C1).

    Abstract translation: 本发明提出了一种用于高频和/或射频调谐的装置，其包括在一个IC封装内的第一可变电容器（C1）和至少一个第二电容器（C2），所述至少一个第二电容器（C2） 固定或可变的至少一个信号路径连接到第一可变电容器（C1）并提供至少一个输入和一个输出端口（rf-port1，rf-port2）和至少一个可控开关装置（SC2），用于 单独地将所述至少一个第二电容器（C2）中的至少一个电容器（C2）连接到所述信号路径或从所述信号路径，特别是与所述第一可变电容器（C1）并联连接。

    Variable frequency microwave oscillator including digital phase shifter as tuning element
    6.
    发明授权
    Variable frequency microwave oscillator including digital phase shifter as tuning element 失效
    变频微波振荡器，包括数字移相器作为调谐元件

    公开(公告)号：US5235293A

    公开(公告)日：1993-08-10

    申请号：US906322

    申请日：1992-06-30

    Applicant: Gregory S. Mendolia

    Inventor： Gregory S. Mendolia

    IPC: H03B1/00 ,  H03B5/12 ,  H03B5/18 ,  H03B7/06

    CPC classification number: H03B5/1852 ,  H03B5/1203 ,  H03B5/1228 ,  H03B5/1231 ,  H03B5/1237 ,  H03B5/1243 ,  H03B2200/0028 ,  H03B2200/004 ,  H03B2201/0208 ,  H03B2201/0291 ,  H03B7/06

    Abstract: A resonator (50) is connected in circuit with a negative resistance element (Q3,Q4) for producing oscillation at a resonant frequency of the resonator (50). A digital phase shifter (58) is incorporated into the resonant frequency in accordance with an applied digital signal. The resonator (50) can be connected in series with the negative resistance element (Q3), in which case the phase shifter (58) is connected as either a short-circuit or an open-circuit transmission line. Alternatively, the resonator (50) can be connected in parallel with the negative resistance element (Q4) in a feedback loop. An analog phase shifter (84) can also be provided in the resonator (50') for continuously variably setting the resonant frequency over the tuning increments of the digital phase shifter (58).

    Abstract translation: 谐振器（50）与负电阻元件（Q3，Q4）电路连接，用于在谐振器（50）的谐振频率处产生振荡。 数字移相器（58）根据所应用的数字信号并入谐振频率。 谐振器（50）可以与负电阻元件（Q3）串联连接，在这种情况下，移相器（58）作为短路或开路传输线连接。 或者，谐振器（50）可以在反馈回路中与负电阻元件（Q4）并联连接。 也可以在谐振器（50'）中设置模拟移相器（84），用于连续地可变地设置谐振频率超过数字移相器（58）的调谐增量。

    Digital modulator with variations of phase and amplitude modulation
    7.
    发明授权
    Digital modulator with variations of phase and amplitude modulation 失效
    具有相位和幅度调制变化的数字调制器

    公开(公告)号：US4584541A

    公开(公告)日：1986-04-22

    申请号：US687546

    申请日：1984-12-28

    Applicant: Edward J. Nossen

    Inventor： Edward J. Nossen

    IPC: H03B1/00 ,  H03C1/00 ,  H03C1/50 ,  H03C3/00 ,  H03C5/00 ,  H03F1/02

    CPC classification number: H03C3/00 ,  H03C1/00 ,  H03F1/0294 ,  H03B2201/0291 ,  H03C1/50 ,  H03C2200/0029 ,  H03C5/00

    Abstract: A phase modulator includes a digital frequency word generator, an adder and a register arranged to generate recurrent digital sawtooth signals at a carrier rate. A second digital adder is coupled to receive the sawtooth signals and also receives digital information signals. The adder produces recurrent digital sawtooth signals phase-modulated by the information signal. A pair of adders receive the digital sawtooth signals and mutually sign-reversed digital information signals to produce a pair of oppositely phase-modulated constant-amplitude signals in a pair of channels. A sine memory is addressed by the phase-modulated digital sawtooth signals to produce phase-modulated sinusoidal-representative digital signals. The digital signals are then converted to analog signals. Since the two channels contain signals which are phase-modulated but not amplitude-modulated, the signals may be amplified by nonlinear amplifiers. An adder is coupled to the outputs of the two channels to sum together the two phase-modulated signals to produce an amplitude-modulated signal. Combinations of amplitude and phase modulation may be generated by a combined structure.

    Abstract translation: 一个相位调制器包括一个数字频率字发生器，一个加法器和一个寄存器，被布置为以载波速率产生复现数字锯齿波信号。 第二数字加法器被耦合以接收锯齿波信号并且还接收数字信息信号。 加法器产生由信息信号相位调制的反复数字锯齿波信号。 一对加法器接收数字锯齿信号和相互反转的数字信息信号，以在一对通道中产生一对相位相位调制的恒定幅度信号。 正弦存储器由相位调制的数字锯齿波信号解决，以产生相位调制的正弦代表性数字信号。 然后将数字信号转换为模拟信号。 由于两个通道包含相位调制但没有幅度调制的信号，因此信号可以被非线性放大器放大。 加法器耦合到两个通道的输出，以将两个相位调制信号相加在一起以产生幅度调制信号。 可以通过组合结构产生振幅和相位调制的组合。

    Voltage controlled oscillator including MuGFETS
    8.
    发明授权
    Voltage controlled oscillator including MuGFETS 有权
    压控振荡器包括MuGFETS

    公开(公告)号：US09325277B1

    公开(公告)日：2016-04-26

    申请号：US14571805

    申请日：2014-12-16

    Applicant: Xilinx, Inc.

    Inventor： Adebabay M. Bekele ,  Parag Upadhyaya

    IPC: H03B5/12

    CPC classification number: H03B5/1253 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1271 ,  H03B5/1278 ,  H03B5/129 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03B2201/0291 ,  H03B2201/031 ,  H03B2201/038

    Abstract: Voltage-controlled oscillation is described. In an apparatus therefor, an inductor has a tap and has or is coupled to a positive-side output node and a negative side output node. The tap is coupled to receive a first current. A coarse grain capacitor array is coupled to the positive-side output node and the negative side output node and is coupled to respectively receive select signals. A varactor is coupled to the positive-side output node and the negative side output node and is coupled to receive a control voltage. The varactor includes MuGFETs. A transconductance cell is coupled to the positive-side output node and the negative side output node, and the transconductance cell has a common node. A frequency scaled resistor network is coupled to the common node and is coupled to receive the select signals for a resistance for a path for a second current.

    Abstract translation: 描述了压控振荡。 在其装置中，电感器具有抽头并且具有或耦合到正侧输出节点和负侧输出节点。 抽头被耦合以接收第一电流。 粗粒电容器阵列耦合到正侧输出节点和负侧输出节点，并被耦合以分别接收选择信号。 变容二极管耦合到正侧输出节点和负侧输出节点，并耦合以接收控制电压。 变异反应器包括MuGFETs。 跨导单元耦合到正侧输出节点和负侧输出节点，并且跨导单元具有公共节点。 频率比例电阻网络耦合到公共节点，并被耦合以接收用于第二电流的路径的电阻的选择信号。

    OSCILLATOR CIRCUIT AND FREQUENCY SYNTHESIZER
    9.
    发明申请
    OSCILLATOR CIRCUIT AND FREQUENCY SYNTHESIZER 有权
    振荡器电路和频率合成器

    公开(公告)号：US20150229318A1

    公开(公告)日：2015-08-13

    申请号：US14608264

    申请日：2015-01-29

    Applicant: Sony Corporation

    Inventor： Masahisa Tamura ,  Hidenori Takeuchi

    IPC: H03L7/22 ,  H03B7/02

    CPC classification number: H03L7/083 ,  H03B5/1206 ,  H03B5/124 ,  H03B5/1265 ,  H03B2201/0291 ,  H03J2200/10 ,  H03L7/085 ,  H03L7/093

    Abstract: An oscillator circuit includes: an arithmetic section configured to correct a first input code value and thereby generate a first code value that is within a first predetermined range, the arithmetic section being configured to correct a second input code value in correspondence with a correction amount of the first input code value and thereby generate a second code value, and the first predetermined range being narrower than a range of the first input code value; and an oscillation section configured to generate an oscillation signal having a frequency that varies at first sensitivity based on the first code value and varies at second sensitivity based on the second code value, the second sensitivity being higher than the first sensitivity.

    Abstract translation: 振荡器电路包括：运算部，被配置为校正第一输入代码值，从而生成在第一预定范围内的第一代码值，所述运算部被配置为根据修正量修正第二输入代码值 第一输入代码值，从而生成第二代码值，并且第一预定范围窄于第一输入代码值的范围; 以及振荡部，被配置为产生具有基于第一代码值在第一灵敏度变化的频率的振荡信号，并且基于第二代码值以第二灵敏度变化，第二灵敏度高于第一灵敏度。

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