公开(公告)号：US20170090542A1

公开(公告)日：2017-03-30

申请号：US14865928

申请日：2015-09-25

Applicant: ADVANCED MICRO DEVICES, INC. ,  ATI TECHNOLOGIES ULC

Inventor： Angel E. Socarras ,  Fei Guo

IPC: G06F1/32

CPC classification number: G06F1/324 ,  G06F1/06 ,  G06F1/10 ,  G06F1/3243 ,  Y02D10/126 ,  Y02D10/152

Abstract: A device and method of operating a synchronous frequency processing environment served by a common power source and common clock source. The method includes operating the processing environment to have a first power consumption. The method further includes determining a first synchronous frequency processing domain within the processing environment where it is desired to implement a first clock frequency alteration in a clock signal for the first synchronous frequency processing domain. The first clock frequency alteration generates an associated first alteration in a power consumption from the first synchronous frequency processing domain. The method further includes determining a second clock frequency alteration to a clock signal for a second synchronous frequency processing domain of the processing environment. The second clock frequency alteration is determined so as to reduce a change in the first power consumption caused by the first alteration in power consumption.

公开(公告)号：US20150332427A1

公开(公告)日：2015-11-19

申请号：US14808113

申请日：2015-07-24

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Michael J. Mantor ,  Jeffrey T. Brady ,  Angel E. Socarras

IPC: G06T1/20 ,  G06T1/60

CPC classification number: G06T1/20 ,  G06T1/60 ,  G09G5/363 ,  G09G2360/06

Abstract: Methods, systems and non-transitory computer readable media are described. A system includes a shader pipe array, a redundant shader pipe array, a sequencer and a redundant shader switch. The shader pipe array includes multiple shader pipes, each of which perform rendering calculations on data provided thereto. The redundant shader pipe array also performs rendering calculations on data provided thereto. The sequencer identifies at least one defective shader pipe in the shader pipe array, and, in response, generates a signal. The redundant shader switch receives the generated signal, and, in response, transfers the data destined for each shader pipe identified as being defective independently to the redundant shader pipe array.

Abstract translation: 描述了方法，系统和非暂时性计算机可读介质。 系统包括着色器管道阵列，冗余着色器管道阵列，定序器和冗余着色器开关。 着色器管道阵列包括多个着色器管道，每个管道对其提供的数据执行渲染计算。 冗余着色器管道阵列还对提供给它的数据执行渲染计算。 定序器在着色器管道阵列中识别至少一个有缺陷的着色器管道，并作为响应生成信号。 冗余着色器开关接收所生成的信号，并作为响应，将指定为每个着色器管道的数据独立地传输到冗余着色器管道阵列。