Abstract:
A pixel circuit for an electronic display may include a memory to store a digital data signal indicative of a value within a data range. The pixel circuit may also include a light-emitting diode to emit light based at least in part on the digital data signal. The pixel circuit may also include an initialization transistor to initialize the pixel circuit before the light-emitting diode emits light and a driving transistor to activate based at least in part on the digital data signal.
Abstract:
A pixel circuit for an electronic display may include a memory to store a digital data signal indicative of a value within a data range. The pixel circuit may also include a light-emitting diode to emit light based at least in part on the digital data signal. The pixel circuit may also include an initialization transistor to initialize the pixel circuit before the light-emitting diode emits light and a driving transistor to activate based at least in part on the digital data signal.
Abstract:
An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk in a display, the pixel definition layer may disrupt continuity of the OLED layers. The pixel definition layer may have an undercut to disrupt continuity of some but not all of the OLED layers. The undercut may be defined by three discrete portions of the pixel definition layer. The undercut may result in a void that is interposed between different portions of the OLED layers to break a leakage path formed by the OLED layers.
Abstract:
A display has rows and columns of pixels (22). A data line (Dn) in each column provides image data signals to the pixels of that column. Each row has first and second control lines (select[m], monitor[m]) coupled to the gates of first and second respective transistors (SE, MO) in each pixel. A third transistor in each pixel serves as a drive transistor (DR) and is coupled in series with a light-emitting diode (30) between positive and ground power supply voltages (VDD, VSS). A display driver circuitry in the display characterizes each of the light-emitting diodes in a column using the data line in an adjacent column from that light-emitting diode. Each of the drive transistors in a column is characterized using the data line in that column and the data line in an adjacent column.
Abstract:
A touch screen having layers. The touch screen can include a substrate upon which the layers of the touch screen are disposed, and a touch region including a touch pixel electrode, a first display sub-pixel and a second display sub-pixel. The touch screen can also include a sense connection coupled to touch sensing circuitry. An intermediate connection can be disposed between the touch pixel electrode and the sense connection, and can be coupled to the sense connection at the first display sub-pixel and the touch pixel electrode at the second display sub-pixel. In some examples, the sense connection can be disposed at least partially underneath a structure in the first display sub-pixel, such as a data line. In some examples, the intermediate connection can be comprised of a same material type as a structure in the first display sub-pixel, such as a gate line material.
Abstract:
A display may have an array of pixels arranged in rows and columns. Display driver circuitry may be provided along an edge of the display. Data lines that are associated with columns of the pixels may be used to distribute data from the display driver circuitry to the pixels. Gate lines in the display may each have a horizontal straight portion that extends along a respective row of the pixels and may each have one or more non-horizontal segments such as zigzag segments. The non-horizontal portion of each gate line may be connected to the horizontal straight portion of the gate line by a via. The non-horizontal portions may each have portions that are overlapped by portions of the data lines. Dummy gate line structures may be provided on the display that are not coupled to any of the pixels in the display.
Abstract:
This application relates to methods and apparatus for refreshing a display device at various frequencies. Specifically, multiple areas of the display device can be refreshed concurrently at different frequencies. In this way, when static content is being displayed in certain areas of the display device, those certain areas can be refreshed at a lower rate than areas displaying dynamic content such as video or animation. By refreshing at lower rates, the energy consumed by the display device and subsystems associated with the display device can be reduced. Additionally, processes for reducing flicker when refreshing the display device at different refresh rates are disclosed herein.
Abstract:
A display device may include a plurality of pixels, a plurality of source lines that may provide a plurality of data line signals to the plurality of pixels, a plurality of gate lines that may provide a plurality of gate signals to a plurality of switches associated with the plurality of pixels, and a plurality of voltage gate lines disposed parallel to the plurality of source lines and coupled to the plurality of gate lines at a plurality of cross point nodes. The plurality of cross point nodes are positioned in a pseudo random order across the display device.
Abstract:
A display may have an array of pixels controlled by display driver circuitry. The display driver circuitry may supply the pixels with data signals over data lines in columns of the pixels and may supply the pixels with gate line signals over gate lines in rows of the pixels. The display driver circuitry may have a display driver integrated circuit located on one of the edges of the display. The display driver circuitry may also have gate driver integrated circuits that extend along opposing edges of the display to form a pair of shift registers. Conductive lines in a display substrate may be coupled to opposing ends of the shift registers and to intermediate locations within the shift registers to minimize delays in distributing a gate high voltage signal from the display driver integrated circuit to the shift registers.
Abstract:
A display has an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The pixels may be liquid crystal display pixels. Each pixel may have a common electrode voltage terminal. The display may have a transparent conductive film that forms a common electrode voltage layer that overlaps that array and that is shorted to the common electrode voltage terminals of the pixels. Metal common electrode voltage lines may run across the transparent conductive film to reduce resistance. Metal common electrode voltage paths that are coupled to the metal common electrode voltage lines may run along the left and right edge of the display. Common electrode voltage compensation circuits may receive feedback from the metal common electrode voltage paths. There may be two or more common electrode voltage compensation circuits for both the left and right edges of the display.