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公开(公告)号：US10964235B1
公开(公告)日：2021-03-30
申请号：US16428375
申请日：2019-05-31
Applicant: Apple Inc.
Inventor： Cheng-Ho Yu , Xiaofeng Wang , ByoungSuk Kim , Chun-Yao Huang , Fenghua Zheng , Hopil Bae , Patrick B. Bennett , Steven M. Scardato , Yi Huang
Abstract: An electronic device may include a display. The display includes display driver circuitry for driving data lines routed across the display. The electronic device may have a recessed device housing region, where at least some of the data lines are routed around the recessed region. The data lines being routed around the recessed region may be formed in at least two different metal routing layers. The electronic device may further include additional display driver circuitry for driving data lines from another peripheral housing edge to obviate the need to route around the recessed region. The data lines from the two display driver circuitries can be disconnected at random locations or can be interlaced to achieve spatial interleaving. The display driver circuitry may include demultiplexing circuitry having smaller switches coupled in parallel with larger demultiplexer routing switches to reduce voltage kick and charge injection.
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公开(公告)号：US10923012B1
公开(公告)日：2021-02-16
申请号：US16814879
申请日：2020-03-10
Applicant: Apple Inc.
Inventor： Jiaxi Hu , Hao-Lin Chiu , Shatam Agarwal , Kwang Soon Park , Joonggun Lee , Kyung Wook Kim , Shih Chang Chang , Fenghua Zheng
IPC: G09G3/20
Abstract: An electronic device may include a display. The display may include display driver circuitry that is configured to provide image data to columns of pixels and gate driver circuitry that is configured to provide control signals to rows of pixels. The display may be operable at a native refresh rate that is equal to the highest refresh rate at which the display has full resolution. The display may also be operable in a high refresh rate mode with a high refresh rate that is twice (or some other scaling factor greater than) the native refresh rate. To enable operation at the high refresh rate mode, vertical resolution of the display may be sacrificed. In other words, rows of pixels may be grouped together into effective rows that are then scanned in sequence. The gate driver circuitry may be formed as thin-film transistor circuitry or from gate driver integrated circuits.
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公开(公告)号：US20200334425A1
公开(公告)日：2020-10-22
申请号：US16391011
申请日：2019-04-22
Applicant: Apple Inc.
Inventor： Daibashish Gangopadhyay , Fenghua Zheng
Abstract: The present disclosure relates generally to electronic devices, and more particularly, to electronic devices that utilize electromagnetic signals (e.g., radio frequency (RF) signals), transmitters, and receivers in various processes, such as cellular and wireless device processes in a at least partially metal enclosure. The present disclosure describes devices that may be used to wirelessly transmit and/or receive electromagnetic signals between processing components and sensing components, for example, by improving sensing device design and thus forming an integrated sensing tag that leverages passive RF technology, such as radio frequency identification (RFID) tags.
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公开(公告)号：US10424239B2
公开(公告)日：2019-09-24
申请号：US15723085
申请日：2017-10-02
Applicant: Apple Inc.
Inventor： James Aamold , Fenghua Zheng , Sandro H. Pintz
IPC: G09G3/32 , G09G3/20 , G09G3/3216
Abstract: This application relates to systems, methods, and apparatus for reducing the power consumption of a display panel. Specifically, the embodiments discussed herein relate to a panel pixel charge scheme that allows the current output of a display driver to be modified based on the content to be displayed at the display panel. The display driver can compare current and upcoming display content in order to determine how the line voltage for one or more output lines will change over time. If, based on the comparison, the voltage for an output line is not going to vary substantially over time, the bias current output from the display driver can be modified in order to save power. The modification to the bias current can depend on the amount of change the line voltage will undergo in subsequent executions of the content data.
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公开(公告)号：US10311822B2
公开(公告)日：2019-06-04
申请号：US15667366
申请日：2017-08-02
Applicant: Apple Inc.
Inventor： Fenghua Zheng , Howard H. Tang , Sandro H. Pintz
Abstract: Systems and methods are provided for improving displayed image quality of an electronic display with reduced power consumption. In some embodiments, a display pixel in the electronic display includes a pixel electrode and a common electrode. A pixel electrode driver electrically coupled to the first display pixel writes the display pixel by supplying a pixel voltage signal to the pixel electrode. A common electrode driver electrically coupled to the common electrode includes a power amplifier that supplies a common voltage signal to the common electrode to predictively offset net charge accumulation expected in the common electrode; a first power supply rail selectively connectable to the power amplifier based on a target voltage of the common voltage signal; and a second power supply rail selectively connectable to the power amplifier based on the target voltage, in which the first and second power supply rails supply different voltages when connected.
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Patent Agency Ranking
公开(公告)号：US10163385B2
公开(公告)日：2018-12-25
申请号：US14855733
申请日：2015-09-16
Applicant: Apple Inc.
Inventor： Fenghua Zheng , Christopher P. Tann , David S. Zalatimo , James E. C. Brown , Sandro H. Pintz
Abstract: A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include gate driver integrated circuits. Each gate driver integrated circuit may have a shift register that supplies the gate line signals to the rows of pixels. The display driver circuitry supplies a clock signal to the gate driver integrated circuits. Each gate driver integrated circuit may have one or more clock trees that are selectively enable and disabled. Each gate driver integrated circuit may have a controller and a buffer that is controlled by a control signal from the controller. The buffer may be adjusted to supply or to not supply the clock signal to an associated clock tree in that gate driver integrated circuit.
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公开(公告)号：US20180061355A1
公开(公告)日：2018-03-01
申请号：US15667366
申请日：2017-08-02
Applicant: Apple Inc.
Inventor： Fenghua Zheng , Howard H. Tang , Sandro H. Pintz
CPC classification number: G09G3/3685 , G06T1/20 , G09G3/2092 , G09G3/3614 , G09G3/3655 , G09G5/003 , G09G2360/16 , H03F1/0211 , H03F2200/507 , H03F2200/511
Abstract: Systems and methods are provided for improving displayed image quality of an electronic display with reduced power consumption. In some embodiments, a display pixel in the electronic display includes a pixel electrode and a common electrode. A pixel electrode driver electrically coupled to the first display pixel writes the display pixel by supplying a pixel voltage signal to the pixel electrode. A common electrode driver electrically coupled to the common electrode includes a power amplifier that supplies a common voltage signal to the common electrode to predictively offset net charge accumulation expected in the common electrode; a first power supply rail selectively connectable to the power amplifier based on a target voltage of the common voltage signal; and a second power supply rail selectively connectable to the power amplifier based on the target voltage, in which the first and second power supply rails supply different voltages when connected.
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公开(公告)号：US20140198093A1
公开(公告)日：2014-07-17
申请号：US14155300
申请日：2014-01-14
Applicant: Apple Inc.
Inventor： Prasanna Nambi , Jason N. Gomez , Fenghua Zheng , Paolo Sacchetto , Sandro H. Pintz , Taesung Kim , Christopher P. Tann , Marc Albrecht , David W. Lum
IPC: G09G3/36
CPC classification number: G09G3/3618 , G06T1/20 , G06T2210/52 , G09G3/36 , G09G3/3611 , G09G3/3648 , G09G3/3655 , G09G3/3696 , G09G2310/08 , G09G2320/0626 , G09G2330/02 , G09G2330/021 , G09G2340/0435 , G09G2360/18 , G09G2370/08
Abstract: The disclosure describes procedures for dynamically employing a variable refresh rate at an LCD display of a consumer electronic device, such as a laptop computer, a tablet computer, a mobile phone, or a music player device. In some configurations, the consumer electronic device can include a host system portion, having one or more processors and a display system portion, having a timing controller, a buffer circuit, a display driver, and a display panel. The display system can receive image data and image control data from a GPU of the host system, evaluate the received image control data to determine a reduced refresh rate (RRR) for employing at the display panel, and then transition to the RRR, whenever practicable, to conserve power. In some scenarios, the transition to the RRR can be a transition from a LRR of 50 hertz or above to a RRR of 40 hertz or below.
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公开(公告)号：US10762856B2
公开(公告)日：2020-09-01
申请号：US15893317
申请日：2018-02-09
Applicant: Apple Inc.
Inventor： Manev Luthra , Joseph P. Manca , Fenghua Zheng , David S. Zalatimo
Abstract: Aspects of the subject technology relate to electronic devices with displays. A display may include an array of display pixels and control circuitry for operating the display. The control circuitry may determine, based on pixel values for a row of display pixels, that a current in common supply voltage circuitry for the display pixels will exceed a threshold, if the row of display pixels is operated using the pixel values. The control circuitry may modify the pixel values for the row of display pixels to reduce the current in the common supply voltage circuitry and/or prevent the current in the common supply voltage circuitry from exceeding the threshold.
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公开(公告)号：US20200042264A1
公开(公告)日：2020-02-06
申请号：US16529705
申请日：2019-08-01
Applicant: Apple Inc.
Inventor： Fenghua Zheng , David S. Zalatimo , James E. Brown , Sachiko Oda , Johan L. Piper
Abstract: Aspects of the subject technology relate to electronic device display circuitry and methods of operating the display. The display circuitry a panel driver interface that decodes digital display data, for each display frame, received from host circuitry of the electronic device. The digital display data includes error correction and detection information for frame and line configuration information distributed in a frame packet and multiple line packets for each display frame. The frame and line configuration information facilitates, efficient, low-error, digital control of various display operational features.
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