公开(公告)号：US20190104311A1

公开(公告)日：2019-04-04

申请号：US15721078

申请日：2017-09-29

Applicant: ATI Technologies ULC

Inventor： Ihab Amer ,  Boris Ivanovic ,  Gabor Sines ,  Yang Liu ,  Ho Hin Lau ,  Haibo Liu ,  Kyle Plumadore

IPC: H04N19/137 ,  H04N19/115

Abstract: Systems, apparatuses, and methods for encoding bitstreams of uniquely rendered video frames with variable frame rates are disclosed. A rendering unit and an encoder in a server are coupled via a network to a client with a decoder. The rendering unit dynamically adjusts the frame rate of uniquely rendered frames. Depending on the embodiment, the rendering unit conveys a constant frame rate to the encoder by repeating some frames or the rendering unit conveys a variable frame rate to the encoder by conveying only uniquely rendered frames to the encoder. Depending on the embodiment, the encoder conveys a constant frame rate bitstream to the decoder by encoding repeated frames as skip frames, or the encoder conveys a variable frame rate bitstream to the decoder by dropping repeated frames from the bitstream.

公开(公告)号：US20140177729A1

公开(公告)日：2014-06-26

申请号：US13724314

申请日：2012-12-21

Applicant: ATI TECHNOLOGIES ULC

Inventor： Haibo Liu

IPC: H04N7/26

CPC classification number: H04N19/40 ,  H04N19/423 ,  H04N19/88

Abstract: A method and apparatus for transcoding video data decodes video that is encoded in the first format and produces decoded data blocks that include decoded tile data such that each decoded block includes pixel data for multiple display lines. The method and apparatus performs a linear write operation on the decoded data block by controlling storing of the decoded data block rows in consecutive linear addresses in memory such that one line of memory comprises decoded data for multiple display lines from the same block. The method and apparatus fetches the line of memory and re-encodes the data into a data block format, In one example translation of the fetched line of memory back into the original decoded data block format is performed for re-encoding such that the block of data includes data for multiple display lines. The video data is re-encoded to the second format using the decoded data block that was translated from the fetched line of memory.

Abstract translation: 用于对视频数据进行代码转换的方法和装置解码以第一格式编码的视频，并产生包括经解码的瓦片数据的解码数据块，使得每个解码的块包括多个显示行的像素数据。 该方法和装置通过控制存储器中的连续线性地址中的解码数据块行的存储器来对解码的数据块执行线性写入操作，使得一行存储器包括来自同一块的多个显示行的解码数据。 该方法和装置取出存储器行并将数据重新编码为数据块格式。在一个示例中，执行将获取的存储器行的转换回原始解码的数据块格式，以进行重新编码，使得块 数据包括多条显示行的数据。 使用从获取的存储器行翻译的解码数据块将视频数据重新编码为第二格式。

公开(公告)号：US11194614B2

公开(公告)日：2021-12-07

申请号：US16591276

申请日：2019-10-02

Applicant: ATI Technologies ULC

Inventor： Yinan Jiang ,  Ahmed M. Abdelkhalek ,  Guopei Qiao ,  Andy Sung ,  Haibo Liu ,  Dezhi Ming ,  Zhidong Xu

IPC: G06F9/455 ,  G06F9/22 ,  G06F9/48

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

公开(公告)号：US11120289B2

公开(公告)日：2021-09-14

申请号：US16588810

申请日：2019-09-30

Applicant: ATI Technologies ULC

Inventor： Feng Pan ,  Wei Gao ,  Yang Liu ,  Crystal Yeong-Pian Sau ,  Haibo Liu ,  Edward A. Harold ,  Ying Luo ,  Ihab Amer ,  Gabor Sines

IPC: G06K9/46 ,  G06T5/40 ,  H04N19/423 ,  H04N19/186 ,  G06K9/62

Abstract: Systems, apparatuses, and methods for performing parallel histogram calculation with application to palette table derivation are disclosed. An encoder calculates a first histogram for a first portion of pixel component value bits of a block of pixels. Then, the encoder selects a first number of the highest pixel count bins from the first histogram. Also, the encoder calculates a second histogram for a second portion of pixel component value bits of the block. The encoder selects a second number of the highest pixel count bins from the second histogram. A third histogram is calculated from the concatenation of bits assigned to the first and second number of bins, and the highest pixel count bins are selected from the third histogram. A palette table is derived based on these highest pixel count bins selected from the third histogram, and the block of pixels is encoded using the palette table.

公开(公告)号：US10452554B2

公开(公告)日：2019-10-22

申请号：US15094391

申请日：2016-04-08

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Ihab Amer ,  Khaled Mammou ,  Haibo Liu ,  Edward Harold ,  Fabio Gulino ,  Samuel Naffziger ,  Gabor Sines ,  Lawrence A. Bair ,  Andy Sung ,  Lei Zhang

IPC: G06F12/08 ,  G11C11/417 ,  G06F12/0877 ,  G06F12/0893 ,  G11C5/14

Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.

公开(公告)号：US20190004842A1

公开(公告)日：2019-01-03

申请号：US15639971

申请日：2017-06-30

Applicant: ATI Technologies ULC

Inventor： Yinan Jiang ,  Ahmed M. Abdelkhalek ,  Guopei Qiao ,  Andy Sung ,  Haibo Liu ,  Dezhi Ming ,  Zhidong Xu

IPC: G06F9/455 ,  G06F9/48 ,  G06F9/22

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

公开(公告)号：US20180063549A1

公开(公告)日：2018-03-01

申请号：US15246503

申请日：2016-08-24

Applicant: ATI Technologies ULC

Inventor： Ihab Amer ,  Gabor Sines ,  Jinbo Qiu ,  Yang Liu ,  Haibo Liu ,  Eren Gurses

IPC: H04N19/59 ,  H04N19/172 ,  H04N19/126 ,  H04N19/51 ,  H04N19/30

CPC classification number: H04N19/59 ,  H04N19/132 ,  H04N19/137 ,  H04N19/172

Abstract: Described is a system and method for dynamically changing a resolution level at a frame level based on runtime pre-encoding analysis of content in a video stream. A video encoder continuously analyzes the content during runtime, and collects statistics and/or characteristics of the content before encoding it. This classifies the frame among pre-defined categories of content, where every category has its own bitrate/resolution relation. The runtime encoding resolution is dynamically dependent on the target bitrate and the collected statistics and/or characteristics of the content. This achieves a high quality encode for sequences that are composed of scenes with various content complexity levels for different frames in the video streams.

公开(公告)号：US20170293564A1

公开(公告)日：2017-10-12

申请号：US15094391

申请日：2016-04-08

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Ihab Amer ,  Khaled Mammou ,  Haibo Liu ,  Edward Harold ,  Fabio Gulino ,  Samuel Naffziger ,  Gabor Sines ,  Lawrence A. Bair ,  Andy Sung ,  Lei Zhang

IPC: G06F12/08 ,  G11C11/417

CPC classification number: G06F12/0877 ,  G06F12/0893 ,  G06F2212/1028 ,  G06F2212/221 ,  G06F2212/60 ,  G11C5/148 ,  G11C11/417

Abstract: Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.

公开(公告)号：US20250008149A1

公开(公告)日：2025-01-02

申请号：US18215897

申请日：2023-06-29

Applicant: ATI TECHNOLOGIES ULC

Inventor： Wei Gao ,  Ihab Amer ,  Haibo Liu ,  Gabor Sines ,  Feng Pan ,  Crystal Sau ,  Dong Liu ,  Minghao Zhu

IPC: H04N19/53

Abstract: To leverage an amount of unused bandwidth at a hardware encoder to generate motion estimation data, a processing unit includes a hardware encoder configured to perform a first encoding job including encoder sessions to encode a captured frame, determine motion estimation data for a rendered frame, and encode the rendered frame. Further, the processing unit includes a pre-processing circuitry configured to determine a set of motion estimation parameters based on an encoder delay associated with the performance of the first encoding job by the hardware encoder. The hardware encoder is then configured to perform a second encoding job using the determined set of motion estimation parameters.

公开(公告)号：US11956441B2

公开(公告)日：2024-04-09

申请号：US17561275

申请日：2021-12-23

Applicant: ATI Technologies ULC

Inventor： Sunil Gopal Koteyar ,  Sonu Thomas ,  Ihab M. A. Amer ,  Haibo Liu

IPC: H04N19/136 ,  H04N19/105 ,  H04N19/142 ,  H04N19/167 ,  H04N19/172 ,  H04N19/423

CPC classification number: H04N19/136 ,  H04N19/105 ,  H04N19/142 ,  H04N19/167 ,  H04N19/172 ,  H04N19/423

Abstract: Methods and devices are provided for encoding a video stream which comprise encoding a plurality of frames of video acquired from different points of view, generating statistical values for the frames of video determined from values of pixels of the frames, generating, for each of the plurality of frames, a perceptual hash value based on statistical values of the frame and encoding a current frame comprising video acquired from a corresponding one of the different points of view using a previously encoded reference frame based on a similarity of perceptual hashes of the current frame and the previously encoded reference frame.