公开(公告)号：US20060070219A1

公开(公告)日：2006-04-06

申请号：US10954644

申请日：2004-09-29

申请人： Cengiz Palanduz ,  Larry Mosley

发明人： Cengiz Palanduz ,  Larry Mosley

IPC分类号： H04R17/00

CPC分类号： H01G4/33 ,  H01G4/228 ,  H01L23/49822 ,  H01L23/5223 ,  H01L27/016 ,  H01L28/40 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15312 ,  Y10T29/42 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

公开(公告)号：US20060001068A1

公开(公告)日：2006-01-05

申请号：US10883490

申请日：2004-06-30

申请人： Larry Mosley ,  Juan Soto ,  Nicholas Holmberg ,  Kevin Lenio ,  Behrooz Mehr

发明人： Larry Mosley ,  Juan Soto ,  Nicholas Holmberg ,  Kevin Lenio ,  Behrooz Mehr

IPC分类号： H01L27/108

CPC分类号： H01G4/30 ,  H01G4/258

摘要： The present disclosure describes an embodiment of an apparatus comprising a first dielectric layer having a first variation of capacitance with temperature, a second dielectric layer having a second variation of capacitance with temperature, the second variation of capacitance with temperature being different than the first variation of capacitance with temperature, and a conductive layer sandwiched between the first and second dielectric layers. Also described is an embodiment of a process comprising forming a first dielectric layer comprising a dielectric having a first composition, stacking a conductive layer on the first dielectric layer, and stacking a second dielectric layer on the conductive layer, the second dielectric layer having a second composition different than the first composition. Other embodiments are also described and claimed.

摘要翻译： 本公开描述了一种装置的实施例，其包括具有第一电容变化与温度的第一介电层，第二电介质层具有第二电容变化与温度的变化，第二电容变化与温度不同于第一变化 具有温度的电容和夹在第一和第二介电层之间的导电层。 还描述了一种方法的实施方案，包括形成包含具有第一组成的电介质的第一介电层，在第一电介质层上堆叠导电层，以及在导电层上层叠第二电介质层，第二介电层具有第二 组成不同于第一组合物。 还描述和要求保护其他实施例。