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    GROUNDING TECHNIQUES FOR BACKSIDE-BIASED SEMICONDUCTOR DICE AND RELATED DEVICES, SYSTEMS AND METHODS
    1.
    发明申请
    GROUNDING TECHNIQUES FOR BACKSIDE-BIASED SEMICONDUCTOR DICE AND RELATED DEVICES, SYSTEMS AND METHODS 审中-公开

    公开(公告)号：US20180233463A1

    公开(公告)日：2018-08-16

    申请号：US15891775

    申请日：2018-02-08

    申请人： Behrooz Mehr ,  Fernando Chen ,  Emmanuel de los Santos ,  Alex Kungo

    发明人： Behrooz Mehr ,  Fernando Chen ,  Emmanuel de los Santos ,  Alex Kungo

    IPC分类号： H01L23/60 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L21/48 ,  H01L25/00

    摘要： Semiconductor devices may include a substrate and a backside-biased semiconductor die supported above the substrate. A backside surface of the backside-biased semiconductor die may be spaced from the substrate. The backside surface may be electrically connected to ground by wire bonds extending to the substrate. Methods of making semiconductor devices may involve supporting a backside-biased semiconductor die supported above a substrate, a backside surface of the backside-biased semiconductor die being spaced from the substrate. The backside surface may be electrically connected to ground by wire bonds extending to the substrate. Systems may include a sensor device, a nontransitory memory device, and at least one semiconductor device operatively connected thereto. The at least one semiconductor device may include a substrate and a backside-biased semiconductor die supported above the substrate. A backside surface of the backside-biased semiconductor die may be electrically connected to ground by wire bonds extending to the substrate.

    Capacitor method and apparatus
    2.
    发明授权
    Capacitor method and apparatus 失效
    电容器方法和装置

    公开(公告)号：US06924970B2

    公开(公告)日：2005-08-02

    申请号：US10335144

    申请日：2002-12-30

    申请人： Behrooz Mehr ,  Juan Soto ,  Kevin Lenio ,  Nick Holmberg

    发明人： Behrooz Mehr ,  Juan Soto ,  Kevin Lenio ,  Nick Holmberg

    IPC分类号： H01G2/20 ,  H01G4/00 ,  H01G4/228 ,  H01G4/232 ,  H01G4/248 ,  H01G4/30

    CPC分类号： H01G4/30 ,  H01G4/232

    摘要： A method and apparatus is provided that pertains to a low inductance capacitor. The capacitor has a first surface electrically interconnected to a plurality of conductive electrodes and one or more second surfaces electrically interconnected to a plurality of electrodes interposed between the electrodes electrically interconnected to the first conductive surface. A dielectric layer separates the layered plurality of electrodes. The one or more second conductive surfaces are positioned within the body of the layered electrodes, such that the distance between the terminations of the first conductive surface and the one or more second conductive surfaces is shortened to lower inductance.

    摘要翻译： 提供一种涉及低电感电容器的方法和装置。 电容器具有电互连到多个导电电极的第一表面和与互连到第一导电表面的电极之间的多个电极电互连的一个或多个第二表面。 电介质层分离多层电极。 一个或多个第二导电表面位于层状电极的主体内，使得第一导电表面的端子与一个或多个第二导电表面之间的距离被缩短以降低电感。

    Drop-in heat sink
    5.
    发明授权
    Drop-in heat sink 失效
    滴入式散热器

    公开(公告)号：US5530295A

    公开(公告)日：1996-06-25

    申请号：US451478

    申请日：1995-05-26

    申请人： Behrooz Mehr

    发明人： Behrooz Mehr

    IPC分类号： H01L21/56 ,  H01L23/433 ,  H01L23/28 ,  H01L23/495

    CPC分类号： H01L21/565 ,  H01L23/4334 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3011 ,  Y10T29/49121 ,  Y10T29/49171 ,  Y10T29/4935

    摘要： A heat sink incorporated into an electronic package. The package contains an integrated circuit enclosed by a dielectric housing. Coupled to the circuit is a lead frame which has a plurality of leads that extend from the outer edges of the housing. The heat sink has a bottom surface pressed against the lead frame and an opposite top surface that is exposed to the ambient. The heat sink also has a pair of oblique steps which engage the housing and insure that the sink does not become detached from the package.

    摘要翻译： 集成在电子封装中的散热器。 该封装包含由绝缘外壳封装的集成电路。 耦合到电路的是引线框架，其具有从壳体的外边缘延伸的多个引线。 散热器具有压靠引线框架的底面和暴露于环境的相对顶面。 散热器还具有与壳体接合的一对倾斜台阶，并确保水槽不会与包装分离。

    Method of making a drop-in heat sink
    6.
    发明授权
    Method of making a drop-in heat sink 失效
    制造散热片的方法

    公开(公告)号：US5444909A

    公开(公告)日：1995-08-29

    申请号：US216156

    申请日：1994-03-22

    申请人： Behrooz Mehr

    发明人： Behrooz Mehr

    IPC分类号： H01L21/56 ,  H01L23/433 ,  H01R43/00

    CPC分类号： H01L21/565 ,  H01L23/4334 ,  H01L2224/48247 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3011 ,  Y10T29/49121 ,  Y10T29/49171 ,  Y10T29/4935

    摘要： A heat sink incorporated into an electronic package. The package contains an integrated circuit enclosed by a dielectric housing. Coupled to the circuit is a lead frame which has a plurality of leads that extend from the outer edges of the housing. The heat sink has a bottom surface pressed against the lead frame and an opposite top surface that is exposed to the ambient. The heat sink also has a pair of oblique steps which engage the housing and insure that the sink does not become detached from the package.

    摘要翻译： 集成在电子封装中的散热器。 该封装包含由绝缘外壳封装的集成电路。 耦合到电路的是引线框架，其具有从壳体的外边缘延伸的多个引线。 散热器具有压靠引线框架的底面和暴露于环境的相对顶面。 散热器还具有与壳体接合的一对倾斜台阶，并确保水槽不会与包装分离。

    Controlled-resistance capacitors, and methods of assembling same
    7.
    发明申请
    Controlled-resistance capacitors, and methods of assembling same 有权
    可控电容电容器及其组装方法

    公开(公告)号：US20070002520A1

    公开(公告)日：2007-01-04

    申请号：US11173877

    申请日：2005-06-30

    申请人： Behrooz Mehr ,  Juan Soto ,  Nicholas Holmberg ,  Kevin Lenio ,  Larry Mosley

    发明人： Behrooz Mehr ,  Juan Soto ,  Nicholas Holmberg ,  Kevin Lenio ,  Larry Mosley

    IPC分类号： H01G4/228 ,  H05K1/16

    CPC分类号： H01G4/012 ,  H01G4/232 ,  H01G4/30

    摘要： A parallel-plate capacitor structure includes a capacitor electrode including a first resistance and an electrode tab appended to the capacitor electrode and including a second resistance. The second equivalent series resistance is greater than the first equivalent series resistance. A process of assembling a parallel-plate capacitor package is also disclosed. A computing system is also disclosed that includes the parallel-plate capacitor package.

    摘要翻译： 平行平板电容器结构包括：电容器电极，包括第一电阻和附加到电容器电极的电极片，并包括第二电阻。 第二等效串联电阻大于第一等效串联电阻。 还公开了组装平行板电容器封装的工艺。 还公开了一种包括平行板电容器封装的计算系统。

    Multi-layer capacitor using dielectric layers having differing compositions
    8.
    发明申请
    Multi-layer capacitor using dielectric layers having differing compositions 审中-公开
    使用具有不同组成的电介质层的多层电容器

    公开(公告)号：US20060001068A1

    公开(公告)日：2006-01-05

    申请号：US10883490

    申请日：2004-06-30

    申请人： Larry Mosley ,  Juan Soto ,  Nicholas Holmberg ,  Kevin Lenio ,  Behrooz Mehr

    发明人： Larry Mosley ,  Juan Soto ,  Nicholas Holmberg ,  Kevin Lenio ,  Behrooz Mehr

    IPC分类号： H01L27/108

    CPC分类号： H01G4/30 ,  H01G4/258

    摘要： The present disclosure describes an embodiment of an apparatus comprising a first dielectric layer having a first variation of capacitance with temperature, a second dielectric layer having a second variation of capacitance with temperature, the second variation of capacitance with temperature being different than the first variation of capacitance with temperature, and a conductive layer sandwiched between the first and second dielectric layers. Also described is an embodiment of a process comprising forming a first dielectric layer comprising a dielectric having a first composition, stacking a conductive layer on the first dielectric layer, and stacking a second dielectric layer on the conductive layer, the second dielectric layer having a second composition different than the first composition. Other embodiments are also described and claimed.

    摘要翻译： 本公开描述了一种装置的实施例，其包括具有第一电容变化与温度的第一介电层，第二电介质层具有第二电容变化与温度的变化，第二电容变化与温度不同于第一变化 具有温度的电容和夹在第一和第二介电层之间的导电层。 还描述了一种方法的实施方案，包括形成包含具有第一组成的电介质的第一介电层，在第一电介质层上堆叠导电层，以及在导电层上层叠第二电介质层，第二介电层具有第二 组成不同于第一组合物。 还描述和要求保护其他实施例。