公开(公告)号：US20070184609A1

公开(公告)日：2007-08-09

申请号：US11733266

申请日：2007-04-10

申请人： Cengiz Palanduz ,  Larry Mosley

发明人： Cengiz Palanduz ,  Larry Mosley

IPC分类号： H01L21/8242

CPC分类号： H01G4/33 ,  H01G4/228 ,  H01L23/49822 ,  H01L23/5223 ,  H01L27/016 ,  H01L28/40 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15312 ,  Y10T29/42 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

摘要翻译： 一种用于形成用于向诸如集成电路的电气设备提供多个功率和参考电源电压电平的分离薄膜电容器的装置和方法可用于空间受限的应用中，并且在需要非常紧密的电连接的应用中 电力消费者和电源。 空间限制应用和紧密耦合应用的示例可以是诸如微处理器的集成电路（IC）。 要向微处理器供电和调节功率需要紧密耦合，以便响应在高时钟速率微处理器中可能发现的瞬时功率需求，并且微处理器封装内的空间是非常有限的。 微处理器可以在微处理器的快速核心逻辑部分中为最小尺寸的快速晶体管使用较低电压电源电平，以及用于微处理器的高速缓冲存储器和I / O晶体管部分的更正常的电压电源电压电平。 因此，可能需要具有多个功率和参考电源电平的紧凑型电容器来为高频IC提供所需的功率。

公开(公告)号：US20060285272A1

公开(公告)日：2006-12-21

申请号：US11463130

申请日：2006-08-08

申请人： Cengiz Palanduz ,  Larry Mosley

发明人： Cengiz Palanduz ,  Larry Mosley

IPC分类号： H03L7/00

CPC分类号： H01G4/33 ,  H01G4/228 ,  H01L23/49822 ,  H01L23/5223 ,  H01L27/016 ,  H01L28/40 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15312 ,  Y10T29/42 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

公开(公告)号：US20060070219A1

公开(公告)日：2006-04-06

申请号：US10954644

申请日：2004-09-29

申请人： Cengiz Palanduz ,  Larry Mosley

发明人： Cengiz Palanduz ,  Larry Mosley

IPC分类号： H04R17/00

CPC分类号： H01G4/33 ,  H01G4/228 ,  H01L23/49822 ,  H01L23/5223 ,  H01L27/016 ,  H01L28/40 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15312 ,  Y10T29/42 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/0401

摘要： An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted. The microprocessor may use a lower voltage power supply level for minimum sized fast transistors in the fast core logic portions of the microprocessor, and a more normal voltage power supply voltage level for the cache memory and I/O transistor portions of the microprocessor. Thus a compact capacitor with multiple power and reference supply levels may be needed to provide the required power for a high frequency IC.

公开(公告)号：US20060065975A1

公开(公告)日：2006-03-30

申请号：US10955944

申请日：2004-09-30

申请人： Larry Mosley ,  Cengiz Palanduz ,  Victor Prokofiev

发明人： Larry Mosley ,  Cengiz Palanduz ,  Victor Prokofiev

IPC分类号： H01L23/34 ,  H01L23/29

CPC分类号： H01L23/50 ,  H01L23/49805 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/15311 ,  H01L2924/19106 ,  H05K1/0231 ,  H05K1/162 ,  H05K2201/0187 ,  H05K2201/10378 ,  H01L2224/0401

摘要： An electronic device includes a material having a first dielectric constant (K) value, and a material having a second dielectric constant (K) value. The first dielectric constant (K) value is lower than the second dielectric constant (K) value. The electronic device also includes input/output connection conductors for transmitting signals to and from a die. The input/output connection conductors are routed through the material of the interposer having the first dielectric constant. The electronic device also includes power connection conductors for delivering power to the die, and ground connection conductors. The power and ground connection conductors are routed through the material having the second dielectric constant.

摘要翻译： 电子器件包括具有第一介电常数（K）值的材料和具有第二介电常数（K）值的材料。 第一介电常数（K）值低于第二介电常数（K）值。 电子设备还包括用于向模具传送信号和从模具传送信号的输入/输出连接导体。 输入/输出连接导体通过具有第一介电常数的插入件的材料布线。 电子设备还包括用于向模具输送功率的电力连接导体和接地连接导体。 电源和接地连接导体穿过具有第二介电常数的材料。

公开(公告)号：US20050136609A1

公开(公告)日：2005-06-23

申请号：US10925428

申请日：2004-08-24

申请人： Larry Mosley ,  Cengiz Palanduz

发明人： Larry Mosley ,  Cengiz Palanduz

IPC分类号： H01G4/10 ,  H01L21/20 ,  H01L21/44 ,  H01L21/8242 ,  H01L23/50 ,  H01L23/64 ,  H05K1/02

CPC分类号： H01G4/10 ,  H01L23/50 ,  H01L23/642 ,  H01L28/90 ,  H01L2224/16225 ,  H01L2224/16265 ,  H01L2924/01019 ,  H01L2924/15311 ,  H01L2924/19103 ,  H01L2924/19106 ,  H01L2924/3025 ,  H05K1/0231

摘要： In one embodiment, a structure and method including an anodic metal oxide substrate used to form a capacitor are described herein.

摘要翻译： 在一个实施例中，本文描述了包括用于形成电容器的阳极金属氧化物衬底的结构和方法。

公开(公告)号：US20050135043A1

公开(公告)日：2005-06-23

申请号：US10803789

申请日：2004-03-17

申请人： Cengiz Palanduz ,  Larry Mosley

发明人： Cengiz Palanduz ,  Larry Mosley

IPC分类号： H01L23/498 ,  H01L23/64 ,  H05K1/03 ,  H05K1/16 ,  H01G9/02

CPC分类号： H05K1/162 ,  H01L23/49822 ,  H01L23/642 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/09309 ,  H01L2224/05599

摘要： A base structure is formed from a green material having first and second opposing sides and having a plurality of via openings therein. The green material is then sintered so that the green material becomes a sintered ceramic material and the base structure becomes a sintered ceramic base structure having the via openings. A conductive via is formed in each via opening of the sintered ceramic base structure. First and second capacitor structures are formed on the sintered ceramic base structure, each on a respective side of the sintered ceramic base structure. The power and ground planes of the capacitor structure are connected to the vias. As such, a capacitor structure can be formed and connected to the vias without the need to drill via openings in brittle substrates such as silicon substrates. Capacitor structures on opposing sides provide more capacitance without manufacturing complexities associated with the manufacture of one capacitor structure having a large number of power and ground planes.

摘要翻译： 基部结构由具有第一和第二相对侧并且其中具有多个通孔的绿色材料形成。 然后将生坯材料烧结，使得生坯成为烧结陶瓷材料，并且基体结构变成具有通路孔的烧结陶瓷基体结构。 导电通孔形成在烧结陶瓷基体结构的每个通孔中。 第一和第二电容器结构形成在烧结陶瓷基体结构上，每个在烧结陶瓷基体结构的相应侧上。 电容器结构的电源和接地平面连接到通孔。 因此，可以形成电容器结构并连接到通孔，而不需要在诸如硅衬底的脆性衬底中钻通孔。 相对侧的电容器结构提供更多的电容，而不需要制造与具有大量电源和接地层的一个电容器结构相关联的复杂性。

公开(公告)号：US06737754B2

公开(公告)日：2004-05-18

申请号：US09777833

申请日：2001-02-05

申请人： Qing Ma ,  Jin Lee ,  Chun Mu ,  Quat Vu ,  Jian Li ,  Larry Mosley

发明人： Qing Ma ,  Jin Lee ,  Chun Mu ,  Quat Vu ,  Jian Li ,  Larry Mosley

IPC分类号： H01L2328

CPC分类号： H01L23/3121 ,  H01L23/4334 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A semiconductor device having a multilayer laminate that includes a thermally stable, flexible polymer film, a semiconductor die, a molding compound, and a heat dissipation member. The die has an active surface and an inactive surface, in which the active surface includes a plurality of contacts. The molding compound contacts both the laminate and the die, but does not contact the die's active or inactive surfaces. The heat dissipation member contacts the die's inactive surface.

摘要翻译： 一种具有多层叠层的半导体器件，其包括热稳定的，柔性的聚合物膜，半导体管芯，模塑料和散热构件。 模具具有活性表面和非活性表面，其中活性表面包括多个触点。 模塑料与层压体和模具接触，但不接触模具的活性或非活性表面。 散热构件接触模具的非活性表面。

公开(公告)号：US5982632A

公开(公告)日：1999-11-09

申请号：US7349

申请日：1998-01-15

申请人： Larry Mosley ,  Anna Madrid ,  Siva Natarajan

发明人： Larry Mosley ,  Anna Madrid ,  Siva Natarajan

IPC分类号： H01L23/12 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K1/18 ,  H05K3/34 ,  H05K1/11 ,  H05K1/14 ,  H05K7/02

CPC分类号： H05K1/181 ,  H01L23/49816 ,  H01L23/50 ,  H01L24/49 ,  H05K1/0243 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48233 ,  H01L2224/48235 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H05K1/0262 ,  H05K1/0263 ,  H05K2201/09809 ,  H05K2201/10689 ,  H05K2201/10734 ,  H05K2201/10969 ,  H05K3/3431 ,  H05K3/3436 ,  Y02P70/611

摘要： A short power signal path integrated circuit package placed on a printed circuit (PC) board and having a first dielectric layer. On top of this first dielectric layer a metallized die pad and a first metal ring, surrounding this metallized die pad, are positioned. The metallized die pad and the first metal ring electrically couple to the PC board to receive respectively a first power supply signal and a second power supply signal. An integrated circuit die is then affixed to the metallized die pad. This integrated circuit die has a first power supply signal bond pad and a second power supply signal bond pad, which respectively are coupled to the metallized die pad and the first metal ring. Consequently, the metallized die pad and the first metal ring operate as a first power supply plane and a second power supply plane coupling the first and the second power supply signals coming from the PC board to the first and the second power supply signal bond pads on the integrated circuit die.

摘要翻译： 放置在印刷电路板（PC）板上并具有第一电介质层的短功率信号路径集成电路封装。 在该第一电介质层的顶部，定位金属化管芯焊盘和围绕该金属化管芯焊盘的第一金属环。 金属化管芯焊盘和第一金属环电耦合到PC板以分别接收第一电源信号和第二电源信号。 然后将集成电路管芯固定到金属化管芯焊盘。 该集成电路管芯具有分别耦合到金属化管芯焊盘和第一金属环的第一电源信号焊盘和第二电源信号焊盘。 因此，金属化管芯焊盘和第一金属环作为第一电源平面和第二电源平面工作，第二电源平面将来自PC板的第一和第二电源信号耦合到第一和第二电源信号焊盘上 集成电路管芯。

公开(公告)号：US5666004A

公开(公告)日：1997-09-09

申请号：US757480

申请日：1996-11-27

申请人： Bidyut K. Bhattacharyya ,  Larry Mosley

发明人： Bidyut K. Bhattacharyya ,  Larry Mosley

IPC分类号： H01L23/64 ,  H01L23/34

CPC分类号： H01L23/642 ,  H01L2224/05644 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/30107 ,  H01L2924/3011

摘要： An electronic package which contains a tantalum oxide capacitor that couples a conductive bottom surface of an integrated circuit to a plurality of conductive lines within the housing of the package. The conductive lines are connected to pins which provide power and ground to the integrated circuit. The pins and conductive lines are also coupled to a number of junctions located on the top surface of the die, by a plurality of wires. The package couples both the top and bottom surfaces of the integrated circuit to the power and ground pins of the package.

摘要翻译： 一种电子封装，其包含将集成电路的导电底表面耦合到封装外壳内的多条导线的氧化钽电容器。 导线连接到为集成电路提供电源和接地的引脚。 引脚和导线也通过多条导线耦合到位于管芯顶表面上的多个结。 封装将集成电路的顶表面和底表面耦合到封装的电源和接地引脚。

公开(公告)号：US20070111460A1

公开(公告)日：2007-05-17

申请号：US11467899

申请日：2006-08-28

申请人： Larry Mosley ,  Quat Vu ,  Yuegang Zhang

发明人： Larry Mosley ,  Quat Vu ,  Yuegang Zhang

IPC分类号： H01L21/00 ,  H01L21/20

CPC分类号： H01G4/33 ,  H01G4/08 ,  Y10S977/742

摘要： In one embodiment, a capacitor comprises a substrate defining a first electrical terminal; a catalyst layer disposed on the substrate; a plurality of carbon nanotubes disposed on the catalyst layer; a dielectric layer disposed over the plurality of carbon nanotubes; and a conductive layer disposed on the dielectric layer and defining a second electrical terminal.

摘要翻译： 在一个实施例中，电容器包括限定第一电端子的衬底; 设置在所述基板上的催化剂层; 设置在所述催化剂层上的多个碳纳米管; 布置在多个碳纳米管上的电介质层; 以及设置在电介质层上并限定第二电端子的导电层。