Semiconductor device, memory system and control method of the semiconductor device
    21.
    发明授权
    Semiconductor device, memory system and control method of the semiconductor device 有权
    半导体器件,存储器系统和半导体器件的控制方法

    公开(公告)号:US07895484B2

    公开(公告)日:2011-02-22

    申请号:US12186140

    申请日:2008-08-05

    IPC分类号: G11C29/00

    摘要: A semiconductor device including a logic circuit and a test circuit is provided which comprises: a logic signal terminal that supplies a signal to the logic circuit; a latch circuit that latches a signal based on a synchronization signal from the test circuit; a first selection circuit that supplies an external signal from the logic signal terminal to one of the logic circuit and the latch circuit selectively based on a test mode signal; and a second selection circuit that supplies one of the external signal and a signal from the test circuit selectively to a memory.

    摘要翻译: 提供了包括逻辑电路和测试电路的半导体器件,其包括:向逻辑电路提供信号的逻辑信号端; 基于来自测试电路的同步信号来锁存信号的锁存电路; 第一选择电路,其基于测试模式信号有选择地将逻辑信号端的外部信号提供给逻辑电路和锁存电路之一; 以及第二选择电路,其将外部信号和来自测试电路的信号选择性地提供给存储器。

    STENT
    22.
    发明申请
    STENT 审中-公开

    公开(公告)号:US20090276036A1

    公开(公告)日:2009-11-05

    申请号:US12161934

    申请日:2007-01-22

    IPC分类号: A61F2/06

    摘要: It is intended to provide a stent having little or no risk of the breakage of a coating layer that is formed on the stent surface in the course of producing or transporting the stent or during the step of expanding the stent in clinical use. In other words, a stent to be implanted in a lumen in the living body wherein a layer including a physiologically active substance, a biodegradable polymer and a citric acid ester employed as a plasticizer is formed at least a part of the surface of the stent body.

    摘要翻译: 本发明提供一种支架,其在制造或输送支架的过程中或在扩张支架的临床用途的步骤中几乎没有或没有破损形成在支架表面上的涂层的风险。 换句话说,植入在活体内腔中的支架,其中包含生物活性物质,可生物降解聚合物和用作增塑剂的柠檬酸酯的层形成在支架体的表面的至少一部分上 。

    Memory device and method for arbitrating internal and external access
    23.
    发明授权
    Memory device and method for arbitrating internal and external access 有权
    用于仲裁内部和外部访问的内存设备和方法

    公开(公告)号:US07287142B2

    公开(公告)日:2007-10-23

    申请号:US10634758

    申请日:2003-08-06

    申请人: Yuji Nakagawa

    发明人: Yuji Nakagawa

    IPC分类号: G06F13/366

    摘要: Disclosed is a semiconductor memory device which shortens an external access time when there is contention between an external access and an internal access. The semiconductor memory device includes an arbiter which receives a first entry signal for entering a first access mode (external access) and a second entry signal for entering a second access mode (internal access) and determines priority of the first and second access modes in accordance with an order of receipt of the first and second entry signals. The arbiter sequentially generates a first mode trigger signal corresponding to the first entry signal and a second mode trigger signal corresponding to the second entry signal in accordance with the determined priority. The arbiter executes the first access mode by priority over the second access mode when the arbiter is supplied with the first entry signal with a predetermined period after the second access mode has been determined to have priority.

    摘要翻译: 公开了一种当存在外部访问和内部访问之间的竞争时缩短外部访问时间的半导体存储器件。 半导体存储器件包括仲裁器,该仲裁器接收用于进入第一访问模式(外部访问)的第一入口信号和用于进入第二访问模式(内部访问)的第二入口信号,并且根据第一访问模式和第二访问模式确定优先级 具有接收第一和第二输入信号的顺序。 仲裁器根据确定的优先级顺序产生对应于第一入口信号的第一模式触发信号和对应于第二入口信号的第二模式触发信号。 当在第二接入模式被确定为具有优先权之后,当仲裁器被提供有第一入口信号时,预定的时间段,仲裁器以优先级执行第一接入模式。

    Secondary battery and capacitor utilizing indole compounds
    24.
    发明授权
    Secondary battery and capacitor utilizing indole compounds 有权
    二次电池和电容器利用吲哚化合物

    公开(公告)号:US07205071B2

    公开(公告)日:2007-04-17

    申请号:US10365550

    申请日:2003-02-13

    IPC分类号: H01M4/58 H01M4/60

    摘要: A secondary battery and capacitor includes as an active material of an electrode a compound having a trimer structure comprising three structure units of one or more kind of indole compounds selected from indole and indole derivatives and a condensed polycyclic structure having a six-membered ring composed of atoms of the second and the third position of the each three structure units, wherein the active material comprises as the compound a first compound having a trimer structure wherein any bonds between the structure units are formed among the second position of one structure unit and the third position of the other structure unit and a second compound having a trimer structure comprising a bond formed among the second position of one structure unit and the second position of the other structure unit, and a proton is utilized as a charge carrier of the first compound and the second compound.

    摘要翻译: 二次电池和电容器包括作为电极的活性材料,具有三聚体结构的化合物,所述三聚体结构包含三种选自吲哚和吲哚衍生物的一种或多种吲哚化合物的结构单元和具有六元环的缩合多环结构,所述六元环由 每个三个结构单元的第二和第三位置的原子,其中活性材料包含作为化合物的具有三聚体结构的第一化合物,其中在一个结构单元的第二位置和第三个结构单元之间形成结构单元之间的任何键 另一个结构单元的位置和具有包含在一个结构单元的第二位置和另一个结构单元的第二位置之间形成的键的三聚体结构的第二化合物和质子被用作第一化合物的电荷载体, 第二种化合物。

    Semiconductor memory device and method for selecting multiple word lines in a semiconductor memory device

    公开(公告)号:US07116604B2

    公开(公告)日:2006-10-03

    申请号:US10790222

    申请日:2004-03-02

    申请人: Yuji Nakagawa

    发明人: Yuji Nakagawa

    CPC分类号: G11C29/34

    摘要: A semiconductor memory device that reduces the time for conducting a multiple word line selection test and operates stably. The semiconductor memory device includes memory cell blocks, row decoders, sense amps, block control circuits, and sense amp drive circuits. Each block control circuit generates a reset signal. The reset signal is used to select the word lines with the row decoders at timings that differ between the blocks. Each block control circuit provides the reset signal to the associated row decoder. The block control circuit also provides the reset signal to the associated sense amp drive circuit so that the sense amps are inactivated at timings that differ between the blocks.

    Image forming apparatus
    26.
    发明授权
    Image forming apparatus 有权
    图像形成装置

    公开(公告)号:US06957022B2

    公开(公告)日:2005-10-18

    申请号:US10769491

    申请日:2004-01-29

    IPC分类号: G03G15/00

    摘要: A plurality of photosensitive drums are disposed in a sheet transport direction so as to be in contact with a transfer belt and a transfer voltage for transferring toner images on the photosensitive drums onto a sheet transported by the transfer belt is applied thereto. A sensor for sensing a temperature or humidity in the working atmosphere of the image forming apparatus is provided; when a jam occurs, sheet transportation is ceased at a first stage to thereby enable the sheet in the jam to be removed; at a second stage subsequent thereto, transportation of the sheet is restarted; and the transfer voltage applied onto the transfer belt is controlled based on a measurement result of the sensor.

    摘要翻译: 多个感光鼓以片材输送方向设置成与转印带接触,并将用于将感光鼓上的调色剂图像转印到由转印带传送的片材上的转印电压施加到转印带上。 提供用于感测图像形成装置的工作气氛中的温度或湿度的传感器; 当发生卡纸时,在第一阶段停止片材输送,从而使得卡纸中的片材被去除; 在其后的第二阶段,片材的运输重新开始; 并且基于传感器的测量结果来控制施加到转印带上的转印电压。

    Semiconductor memory device and method for testing semiconductor memory device
    27.
    发明授权
    Semiconductor memory device and method for testing semiconductor memory device 失效
    半导体存储器件和半导体存储器件测试方法

    公开(公告)号:US06813203B2

    公开(公告)日:2004-11-02

    申请号:US10632899

    申请日:2003-08-04

    申请人: Yuji Nakagawa

    发明人: Yuji Nakagawa

    IPC分类号: G11C2900

    摘要: A semiconductor memory device for easily and accurately evaluating a device. The memory device has a first access mode and a second access mode. The memory device includes an entry signal generation circuit to synthesize input signals and generate a first entry signal used to enter the first access mode. A control circuit generates a first mode trigger signal in response to the first entry signal. The control circuit also receives a second entry signal used to enter the second access mode and generates a second mode trigger signal in response to the second entry signal. The entry signal generation circuit logically synthesizes the input signals in a selective manner in accordance with a selection control signal to generate the first entry signal.

    摘要翻译: 一种用于容易且准确地评估装置的半导体存储器件。 存储器件具有第一存取模式和第二存取模式。 存储器件包括一个入口信号产生电路,用于合成输入信号并产生用于进入第一存取模式的第一入口信号。 控制电路响应于第一输入信号产生第一模式触发信号。 控制电路还接收用于进入第二存取模式的第二输入信号,并且响应于第二输入信号产生第二模式触发信号。 入口信号生成电路根据选择控制信号以选择的方式对输入信号进行逻辑合成,生成第一入口信号。

    Filter unit having two attenuation poles
    28.
    发明授权
    Filter unit having two attenuation poles 失效
    滤波器单元具有两个衰减极点

    公开(公告)号:US06531933B2

    公开(公告)日:2003-03-11

    申请号:US09960964

    申请日:2001-09-25

    IPC分类号: H01P1213

    摘要: A filter unit comprising a band-pass filter for passing signals of a specified frequency band, a SAW filter for passing signals of a band around a frequency fp2 positioned between a cutoff frequency fc of the band-pass filter and an attenuation pole frequency fp1 thereof, and an inversion circuit for inverting the phase of the signal passing through the SAW filter and superposing the phase-inverted signal on an output signal from the band-pass filter.

    摘要翻译: 一种滤波器单元,包括用于传递指定频带的信号的带通滤波器,用于使位于带通滤波器的截止频率fc之间的频率f 2附近的频带的信号与其衰减极点频率fp1通过的SAW滤波器 以及反相电路,用于使通过SAW滤波器的信号的相位反相,并将相位反相信号叠加在来自带通滤波器的输出信号上。