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公开(公告)号：US10964763B2
公开(公告)日：2021-03-30
申请号：US16417105
申请日：2019-05-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan Xu , Yicheng Lin , Ling Wang , Guoying Wang
Abstract: A display panel, a manufacturing method thereof and a display device are disclosed. The display panel includes a display backplane and a display cover assembled to be a cell. The display backplane includes a first base substrate, a pixel circuit layer, a first electrode layer, a light-emitting layer, a second transparent electrode layer, and a plurality of first pixel regions stacked on the first base substrate. The display cover includes a second base substrate, a plurality of optical sensing components and a plurality of second pixel regions on the second base substrate, the plurality of optical sensing components being arranged in the plurality of second pixel regions in one to one correspondence.
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公开(公告)号：US10803823B2
公开(公告)日：2020-10-13
申请号：US15772677
申请日：2017-09-15
Inventor： Meng Li , Yongqian Li , Pan Xu , Miao Zhang
Abstract: The present application provides a shift register circuit, a gate driving circuit including the shift register circuit, and a driving method applied to the shift register circuit. The shift register circuit includes an input sub-circuit, an output sub-circuit, an output reset sub-circuit, and a first capacitor, wherein the first capacitor is connected between the pull-up node and the second clock signal terminal, and configured to maintain a high level at the pull-up node through the second clock signal input at the second clock signal terminal. The shift register circuit further includes a second capacitor connected between the pull-down node and a first voltage input terminal, and configured to pull down a level at the pull-down node through a reverse bias voltage input at the first voltage input terminal during a blanking time after a frame of scanning ends.
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23.发明授权公开(公告)号：US10784445B2
公开(公告)日：2020-09-22
申请号：US16405726
申请日：2019-05-07
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ling Wang , Cuili Gai , Pan Xu , Yicheng Lin
Abstract: A test substrate includes a base and a first electrode layer, a pixel defining layer, a light-emitting functional layer and a second electrode layer disposed on the base in sequence. The test substrate has at least two test regions, and each test region is a region where one first electrode of the plurality of first electrodes is located. Each test region includes a first region. Orthographic projections of portions of the pixel defining layer and the light-emitting functional layer located in a same first region on the base overlap with each other, and areas of orthographic projections of portions of the first electrode layer located in first regions of the at least two test regions are different.
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公开(公告)号：US10565909B2
公开(公告)日：2020-02-18
申请号：US15540752
申请日：2016-11-09
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan Xu , Guangcai Yuan , Yongqian Li , Dongxu Han
IPC: G09G3/00 , G09G3/3225
Abstract: A test method of a display panel and a test device are disclosed. The test method includes outputting a data signal of a preset test image to the display panel to cause plural light emitting elements to emit light according to the preset test image; outputting a starting signal to a scan circuit in the display panel to cause the scan circuit to output an active level of a switching circuit to the plural rows of first scan lines as connected, successively, according to a preset timing sequence; receiving a sensing signal from a sensor circuit, including voltage value information of a first terminal of every light emitting element; comparing the voltage value information of the first terminal of every light emitting element with the preset test image to obtain a test result. The test method solves the problem of missing detection of Mura.
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公开(公告)号：US10347177B2
公开(公告)日：2019-07-09
申请号：US15168886
申请日：2016-05-31
Inventor： Yuting Zhang , Feng Liao , Zhongyuan Wu , Pan Xu
IPC: G09G3/3258 , G09G3/3266 , G09G3/3233
Abstract: The present invention provides a pixel driving circuit, a driving method thereof, and a display device. The pixel driving circuit of the present invention comprises a data writing unit, a threshold compensation unit, a driving unit, a light-emitting unit, and a voltage stabilizing unit; the data writing unit is connected with a first node, a scan signal line and a data signal line; the first node is a connection node between the data writing unit and the driving unit; the threshold compensation unit is connected with the first node, a first control signal line, a first voltage terminal and the driving unit; the driving unit is connected with the light-emitting unit; and the voltage stabilizing unit is connected with the data writing unit, a second control signal line and the first voltage terminal.
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Patent Agency Ranking
公开(公告)号：US20180330667A1
公开(公告)日：2018-11-15
申请号：US15833080
申请日：2017-12-06
Inventor： Zhidong Yuan , Yongqian Li , Min He , Can Yuan , Pan Xu
IPC: G09G3/3258
CPC classification number: G09G3/3258 , G09G3/3233 , G09G3/3266 , G09G2300/0861 , G09G2310/0262
Abstract: A gate driving unit, a gate driving circuit, a display driving circuit and a display device. The gate driving unit comprises: an input circuit; a first control circuit, configured to provide a first power voltage signal to a first control node in a case that a pull-up node is at an active voltage level; a second control circuit, configured to provide a third clock signal of a third clock terminal to a second control node in a case that the pull-up node is at the active voltage level, and pull down the second control node to a second power voltage signal of a second power voltage terminal in a case that the pull-up node is at a non-active voltage level; and an output circuit, configured to output the first power voltage signal of a first power voltage terminal to the output terminal.
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公开(公告)号：US20180301100A1
公开(公告)日：2018-10-18
申请号：US15821149
申请日：2017-11-22
Inventor： Meng Li , Yongqian Li , Pan Xu , Zhenfei Cai , Zhidong Yuan , Can Yuan , Xuehuan Feng , Wenchao Bao
IPC: G09G3/36
Abstract: A display device, a gate driving circuit and a gate driving unit are provided. The gate driving unit includes: a signal maintenance circuit configured to, in the case that a first clock signal at a high level is received, output a high level in accordance with an inputted trigger signal at a high level; a first-level output circuit configured to, in the case that a second clock signal at a high level is received, output a first-level driving signal at a high level in accordance with the high level from an output end of the signal maintenance circuit; and a second-level output circuit configured to, in the case that a third clock signal at a high level is received, output a second-level driving signal at a high level in accordance with the high level from an output end of the first-level output circuit.
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公开(公告)号：US10068526B2
公开(公告)日：2018-09-04
申请号：US15102993
申请日：2015-10-23
Inventor： Pan Xu , Zhongyuan Wu , Yuting Zhang , Yongqian Li
IPC: G09G5/10 , G09G3/36 , G06F3/038 , G09G5/00 , G09G3/3258 , G09G3/3241
Abstract: There are disclosed a pixel circuit and a driving method of the same and a display apparatus. The pixel circuit comprises: a driving transistor (Tr), a storage capacitor (Cs), a data writing module (10), a light-emitting element (20) and a predetermined voltage writing module (30). A first terminal of the storage capacitor (Cs) is connected to a gate of the driving transistor (Tr) and a second terminal thereof is connected to a second electrode of the driving transistor (Tr). The predetermined voltage writing module (30) is configured to make the second electrode of the driving transistor (Tr) reach a predetermined potential in a pre-charging phase and a compensating phase; and the data writing module (10) is configured to store a data voltage of a data line into the storage capacitor (Cs) in the compensating phase. In the pixel circuit and the driving method thereof and the display apparatus, the driving current is not affected by the threshold voltage, and influence of the voltage across the light-emitting element on the driving current is eliminated, thereby the uniformity of luminance of the light-emitting element is raised and improving the display effect of the display apparatus is improved.
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公开(公告)号：US20250151583A1
公开(公告)日：2025-05-08
申请号：US19014454
申请日：2025-01-09
Inventor： Pan Xu , Zhidong Yuan , Yongqian Li , Can Yuan
IPC: H10K59/80 , H10K59/12 , H10K59/124
Abstract: Provided are a display panel and a method for manufacturing the same, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a separator located at the peripheral area and including at least one separation portion, each separation portion including a first and a second separation layer, and the orthographic projection of the first separation layer on the base substrate is within that of the second separation layer; a cathode including: a first cathode portion, and a second cathode spaced apart from the first cathode portion; and an encapsulation layer including a first and a second inorganic layer, and an organic layer located between the first and the second inorganic layer, wherein edges of the orthographic projections of the first inorganic layer, the organic layer, and the second inorganic layer on the base substrate overlap.
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公开(公告)号：US20250124876A1
公开(公告)日：2025-04-17
申请号：US18577444
申请日：2023-03-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Chengyuan Luo , Pan Xu , Ying Han , Donghui Zhao , Guangshuang Lv , Xing Zhang , Miao Liu , Xing Yao , Cheng Xu
IPC: G09G3/3266 , H10K59/131
Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.
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