Abstract:
The present disclosure discloses a thin film transistor, a method for manufacturing thereof, an array substrate and a display device. The method for manufacturing the thin film transistor includes: forming a nanowire active layer on one side of a base substrate; forming a conductive protective layer on one side of the nanowire active layer away from the base substrate; forming an insulating layer on one side of the protective layer away from the nanowire active layer; etching the insulating layer using a dry etching process to form a first via hole exposing a first region of the protective layer and a second via hole exposing a second region of the protective layer; and forming a source-drain layer on one side of the insulating layer away from the protective layer, wherein the source-drain layer includes a first electrode and a second electrode.
Abstract:
A display panel is provided, including a substrate on a base, a transistor stack on the substrate, and a fluorescent layer between the base and the transistor stack. The fluorescent layer is configured to prevent light from damaging an active layer in the transistor stack in a laser lift-off process, and an orthographic projection of the fluorescent layer on the base overlaps an orthographic projection of the active layer on the base. A display device comprising the display panel, and a manufacturing method of the display panel are further provided.
Abstract:
The disclosure relates to an array substrate and a manufacturing method therefor, a display panel, and a display device. The array substrate comprises a base substrate, and a lead-out line and an inorganic insulating layer which are located on one side of the base substrate; the base substrate is provided with a plurality of connection vias penetrating the base substrate and filled with a first conductive material; the inorganic insulating layer is provided with a first via and a second via, the first via penetrating to the first conductive material, and the second via penetrating to the lead-out line; a second conductive layer is disposed on the side, away from the base substrate, of the first via, the second via and the inorganic insulating layer, such that the first conductive material and the lead-out line are electrically connected through the second conductive layer.
Abstract:
A photosensitive sensor and a method of manufacturing the photosensitive sensor are disclosed. The photosensitive sensor includes a thin film transistor and a photosensitive element on a substrate, wherein the photosensitive element includes a first electrode, a second electrode, and a photosensitive layer between the first electrode and the second electrode. The second electrode is connected to a drain electrode of the thin film transistor. An orthographic projection of an active layer of the thin film transistor on the substrate is within an orthographic projection of the second electrode on the substrate. The second electrode includes at least two stacked conductive layers, at least one of the at least two stacked conductive layers being a light shielding metal layer.
Abstract:
The present disclosure relates to a photoetching parameter adjustment method, apparatus and mask plate, in the field of photoetching technology. The method comprises: forming a photoresist pattern on a first substrate by a photoetching process, wherein the photoresist pattern comprises a photoetching detection pattern; judging whether photoetching parameters of the photoetching process need to be adjusted or not in accordance with the photoetching detection pattern; and adjusting the photoetching parameters when the photoetching parameters need to be adjusted. The present disclosure solves the problem that the reliability of the photoetching parameters is low and improves the reliability of the photoetching parameters. The present disclosure is used for adjusting photoetching parameters.
Abstract:
The present invention provides a phase-shift mask comprising a light shading region which is covered by a light shading pattern and a light transmission region which is not covered by the light shading pattern, the light shading pattern comprises a symmetrical part and an asymmetrical part provided outside the symmetrical part, wherein, an optical blocking unit is provided in a part of the light transmission region outside the symmetrical part away from the asymmetrical part, so that intensity of light transmitted through the part of the light transmission region provided with the optical blocking unit is reduced. During an exposure process using the phase-shift mask of the present invention, the obtained exposure intensity is more uniform.
Abstract:
It is provided a method of estimating an image sticking grade of a display, comprising steps of: displaying a first image in a first frame and a second image in a second frame on the display; switching the display, at at least two sampling times, to display the first image, and then obtaining brightness change factors and image sticking area factors for an image sticking displayed on the display at each sampling time to determine at least two image sticking grades corresponding to each sampling time, wherein an image sticking fading period is set as interval time between two adjacent sampling times to perform an image sticking fading process of the display; and determining a change trend of the image sticking grades of the display during the image sticking fading process based on the at least two image sticking grades when the image sticking stops fading. From the change trend, adverse influences of the image sticking on the display performance may be reflected accurately and fully such that related comprehensive modifications may be made by the skilled based on defects caused by the image sticking in the display.
Abstract:
A light-emitting substrate includes a transparent substrate; a first metal light-shielding layer, a wiring layer and light-emitting devices. The first metal light-shielding layer is disposed on the transparent substrate. The wiring layer is disposed on a side of the first metal light-shielding layer away from the transparent substrate, and the wiring layer includes circuit traces and pads. Orthographic projections of the circuit traces and the pads on the transparent substrate are all located within an orthographic projection of the first metal light-shielding layer on the transparent substrate. The light-emitting devices are disposed on a side of the wiring layer away from the transparent substrate, and electrically connected to some of the pads; and orthographic projections of the light-emitting devices on the transparent substrate are located within the orthographic projection of the first metal light-shielding layer on the transparent substrate.
Abstract:
An array substrate and a manufacturing method thereof, a display device and a manufacturing method thereof are provided, which belong to the technical field of display. The array substrate includes: an interposer substrate, a fan-out region and a thin-film transistor disposed on one side of the interposer substrate, and a bonding connection line disposed on the other side of the interposer substrate. The bonding connection line includes a first lead and a second lead that are insulated from each other. The interposer substrate is provided with a first interposer via hole and a second interposer via hole. The first lead is electrically connected to the thin-film transistor by a conductive structure in the first interposer via hole and the fan-out region, and the second lead is electrically connected to the thin-film transistor by a conductive structure in the second interposer via hole and the fan-out region.
Abstract:
The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. In the display substrate of the present disclosure, a first transistor comprises a first gate electrode, a first electrode, a second electrode, and a first active layer; and a second transistor comprises a second gate electrode, a third electrode, a fourth electrode, and a second active layers, wherein the first active layer comprises a silicon material, the second active layer comprises an oxide semiconductor material, and wherein the third electrode and the first gate electrode are disposed in the same layer, and the fourth electrode and the first electrode, the second electrodes are disposed in the same layer.