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公开(公告)号：US12183748B2
公开(公告)日：2024-12-31
申请号：US18518526
申请日：2023-11-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ke Wang , Muxin Di , Zhiwei Liang , Guoqiang Wang , Renquan Gu , Xiaoxin Song , Xiaoyan Zhu , Yingwei Liu , Zhanfeng Cao
IPC: H01L27/12
Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.
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公开(公告)号：US11637166B2
公开(公告)日：2023-04-25
申请号：US16651551
申请日：2019-11-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yingwei Liu , Qi Yao , Ke Wang , Zhanfeng Cao , Zhiwei Liang , Muxin Di , Guangcai Yuan , Xue Jiang , Dongni Liu
Abstract: The present disclosure relates to a method of manufacturing an array substrate. The method of manufacturing an array substrate may include forming a main via hole in a substrate, filling a first conductive material in the main via hole, and forming a pixel circuit layer on a first surface of the substrate. The pixel circuit layer may include a first via hole. An orthographic projection of the first via hole on the substrate may at least partially overlap the corresponding main via hole.
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公开(公告)号：US20230049038A1
公开(公告)日：2023-02-16
申请号：US17975894
申请日：2022-10-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Renquan Gu , Qi Yao , Jaiil Ryu , Zhiwei Liang , Yingwei Liu , Wusheng Li , Muxin Di
IPC: H01L27/32
Abstract: An array substrate and a manufacturing method thereof, a display device and a manufacturing method thereof are provided, which belong to the technical field of display. The array substrate includes: an interposer substrate, a fan-out region and a thin-film transistor disposed on one side of the interposer substrate, and a bonding connection line disposed on the other side of the interposer substrate. The bonding connection line includes a first lead and a second lead that are insulated from each other. The interposer substrate is provided with a first interposer via hole and a second interposer via hole. The first lead is electrically connected to the thin-film transistor by a conductive structure in the first interposer via hole and the fan-out region, and the second lead is electrically connected to the thin-film transistor by a conductive structure in the second interposer via hole and the fan-out region.
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公开(公告)号：US11581461B2
公开(公告)日：2023-02-14
申请号：US16917921
申请日：2020-07-01
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhiwei Liang , Wenqian Luo , Yingwei Liu , Zhanfeng Cao , Ke Wang
Abstract: A display substrate includes a drive substrate and a welding pad provided on the drive substrate and electrically connected with the drive substrate. The display substrate further includes an insulating construction layer provided on the welding pad. The insulating construction layer is provided with a groove for exposing the welding pad. A bonding material is accommodated in the groove, and a micro light emitting diode is electrically connected with the welding pad through the bonding material.
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公开(公告)号：US20220123178A1
公开(公告)日：2022-04-21
申请号：US17308285
申请日：2021-05-05
Applicant: BOE Technology Group Co., Ltd.
Inventor： Shipei Li , Ying Zhao , Wei He , Zhiwei Liang
Abstract: A light emitting base plate and a fabricating method thereof, and a displaying device. In the present disclosure, a light shielding layer is provided on a substrate, a driving functional layer is provided on the light shielding layer, and a light-emitting-device layer and a light absorbing layer are provided on the driving functional layer; the light-emitting-device layer includes a plurality of light emitting devices, and the light absorbing layer includes light absorbing structures each of which surrounds sides of one of the light emitting devices; and the light absorbing structures are configured for blocking light rays exiting from the sides of the light emitting devices.
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Patent Agency Ranking
公开(公告)号：US20210074689A1
公开(公告)日：2021-03-11
申请号：US16984511
申请日：2020-08-04
Applicant: BOE Technology Group Co., Ltd.
Inventor： Hsuanwei MAI , Zhanfeng Cao , Ke Wang , Haixu Li , Zhiwei Liang , Zhijun Lv
IPC: H01L25/075 , H01L33/00
Abstract: Disclosed are a transfer carrier and a manufacturing method thereof, and a method for transferring a light-emitting diode chip. The transfer carrier includes: a substrate having a plurality of via holes penetrating a thickness of the substrate, the substrate having a first surface and second surface which are opposite to each other; and thermoplastic structures filling corresponding ones of the via holes, one end of the thermoplastic structures protruding from the second surface of the substrate, and the other end covering a surrounding area on the first surface, of the corresponding via holes.
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公开(公告)号：US20200035147A1
公开(公告)日：2020-01-30
申请号：US16406542
申请日：2019-05-08
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Shengguang Ban , Zhanfeng Cao , Zhiwei Liang , Shi Shu
Abstract: A substrate for light-emitting diode, a backlight module and a display device are disclosed. The substrate for light-emitting diode includes a plurality of light-emitting sub-regions, and each of the plurality of light-emitting sub-regions includes at least two anode electrode pads electrically connected through a first parallel-connection line, and at least two cathode electrode pads electrically connected through a second parallel-connection line. The at least two cathode electrode pads are disposed in one-to-one correspondence with the at least two anode electrode pads. At least one series-connection electrode pad group is further disposed between the anode electrode pad and the cathode electrode pad which are corresponding to each other; and each of the at least one series-connection electrode pad group includes two series electrode pads which are electrically connected through a series-connection line.
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公开(公告)号：US12132160B2
公开(公告)日：2024-10-29
申请号：US17615075
申请日：2020-11-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yingwei Liu , Zhanfeng Cao , Zhiwei Liang , Ke Wang , Muxin Di , Shuang Liang , Yankai Gao
IPC: H01L33/62 , G09F9/302 , H01L25/075 , H01L33/00 , H01L33/38
CPC classification number: H01L33/62 , G09F9/3026 , H01L25/0753 , H01L33/005 , H01L33/387 , H01L2933/0016 , H01L2933/0066
Abstract: A method of manufacturing a driving backplane for display includes: forming a first conductive pattern layer including first conductive lines on a base; and forming a second conductive pattern layer including electrode groups and second conductive lines on a side of the first conductive pattern layer away from the base. The first conductive lines and the second conductive lines cross and are insulated from each other; an electrode group includes a first electrode and a second electrode electrically connected to a corresponding second conductive line. Orthogonal projections, on the base, of the first electrode and a corresponding first conductive line have an overlapping region, and a portion of the first electrode, whose orthogonal projection on the base is located in the overlapping region, is in contact with a portion of the first conductive line, whose orthogonal projection on the base is located in the overlapping region.
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公开(公告)号：US20240088170A1
公开(公告)日：2024-03-14
申请号：US18518526
申请日：2023-11-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ke Wang , Muxin Di , Zhiwei Liang , Guoqiang Wang , Renquan Gu , Xiaoxin Song , Xiaoyan Zhu , Yingwei Liu , Zhanfeng Cao
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L27/1251 , H01L27/127
Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.
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公开(公告)号：US11894394B2
公开(公告)日：2024-02-06
申请号：US17281015
申请日：2020-01-03
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhanfeng Cao , Yingwei Liu , Ke Wang , Guocai Zhang , Jianguo Wang , Zhiwei Liang , Haixu Li , Muxin Di
CPC classification number: H01L27/124 , C25D7/123 , C25D17/007 , H01L27/127 , H01L27/156
Abstract: An array substrate, a method for preparing the array substrate, and a backlight module are disclosed. Before electroplating a first metal layer on a pattern of a seed layer, the method further includes: forming a pattern of a compensation electrode wire electrically connected with a lead electrode on a side, where the lead electrode is formed, of a base substrate. The compensation electrode wire is at least on a second side of a wiring region, the pattern of the lead electrode is formed at a first side of the wiring region, and the first side and the second side are different sides. In the electroplating process, the lead electrode is connected with a negative pole of a power supply, the compensation electrode wire is electrically connected with the lead electrode, thus an area of an electroplating negative pole generating electric field lines is increased by utilizing the compensation electrode wire.
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