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21.发明授权公开(公告)号：US10217391B2
公开(公告)日：2019-02-26
申请号：US15541639
申请日：2016-09-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Guangliang Shang , Xing Yao , Seungwoo Han , Yujie Gao , Yuanbo Zhang , Ming Chen , Jungmok Jun , Xue Dong
IPC: G11C19/28 , G09G3/32 , G09G3/36 , G09G3/20 , G09G3/3266
Abstract: Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
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22.发明申请公开(公告)号：US20180204494A1
公开(公告)日：2018-07-19
申请号：US15541639
申请日：2016-09-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Guangliang Shang , Xing Yao , Seungwoo Han , Yujie Gao , Yuanbo Zhang , Ming Chen , Jungmok Jun , Xue Dong
CPC classification number: G09G3/20 , G09G3/3266 , G09G3/3677 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G11C19/28 , G11C19/287
Abstract: Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
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23.发明公开公开(公告)号：US20240329779A1
公开(公告)日：2024-10-03
申请号：US18672157
申请日：2024-05-23
Inventor： Xia Shi , Yuanhui Guo , Jie Han , Jian Zhao , Peipei Zhang , Yujie Gao
IPC: G06F3/042
CPC classification number: G06F3/0421 , G06F2203/04103
Abstract: A manufacturing method of a touch substrate, a touch substrate, and a touch displaying device. The touch substrate includes a base plate; touch electrodes; and at least three light adjustment layers stacked on a side of the base plate, and adjacent two of the light adjustment layers have different refractive indexes; among the at least three light adjustment layers, a thickness of a light adjustment layer close to the base plate is greater than the thicknesses of another light adjustment layer adjacent to the light adjustment layer; the touch electrodes include a first touch electrode and a second touch electrode that are disposed on a side, backing onto the light adjustment layers, of the base plate, the first touch electrode and the second touch electrode are disposed in different layers, and the second touch electrode is disposed on a side, backing onto the base plate, of the first touch electrode.
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公开(公告)号：US11971620B2
公开(公告)日：2024-04-30
申请号：US17907986
申请日：2021-11-22
Inventor： Yang Hu , Yuanhui Guo , Xia Shi , Yujie Gao
IPC: G02F1/1333 , G02F1/1343 , G02F1/1362
CPC classification number: G02F1/133377 , G02F1/134354 , G02F1/136286
Abstract: The present disclosure is related to a display panel and an electronic device. The display panel may include an array substrate and an opposing substrate. The array substrate includes scan lines, data lines, a first blocking wall and a second blocking wall. The first blocking wall and the second blocking wall are respectively arranged on opposite sides of at least one of the scan lines, and each of the first blocking wall and the second blocking wall includes a first blocking layer arranged in a same layer as the scan lines and a second blocking layer arranged in a same layer as the data lines. The distance between the first blocking layer and the scan line in a first direction is smaller than the distance between the second blocking layer and the scan line in the first direction.
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公开(公告)号：US11688325B2
公开(公告)日：2023-06-27
申请号：US17531489
申请日：2021-11-19
CPC classification number: G09G3/2074 , G09G3/3607 , G09G2320/0257 , G09G2360/16
Abstract: Provided is a method for driving display and display device including: determining a first target grayscale value and a second target grayscale value in a grayscale matrix of an image to be displayed, the first target grayscale value and the second target grayscale value corresponding to the first sub-pixel and the second sub-pixel of one of the plurality of sub-pixel groups respectively; determining a first actual grayscale value and a second actual grayscale value based on the first target grayscale value and the second grayscale value; driving a first sub-pixel and a second sub-pixel based on the first actual grayscale value and the second actual grayscale value, in an nth display phase; driving a second sub-pixel and a first sub-pixel based on the first target grayscale value and the second actual grayscale value, in an (n+1)th display phase.
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Patent Agency Ranking
公开(公告)号：US11480834B2
公开(公告)日：2022-10-25
申请号：US17265924
申请日：2020-07-01
Inventor： Yuanhui Guo , Yujie Gao , Xia Shi , Wei Zhang
IPC: G02F1/1347 , G02F1/1362
Abstract: This disclosure relates to a display panel and a display device. The display panel includes: a display liquid crystal panel, including a plurality of sub-pixels defined by a first grid structure and arranged in an array; and a dimming liquid crystal panel, located on a light incident side of the display liquid crystal panel and stacked with the display liquid crystal panel, the dimming liquid crystal panel including a plurality of dimming pixels defined by a second grid structure and arranged in an array, and the second grid structure comprising a plurality of first shading lines extending in a waveform along a row direction; wherein the dimming liquid crystal panel further includes a plurality of second shading lines extending along the row direction, and the second shading lines are intersected with the first shading lines.
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公开(公告)号：US10423026B2
公开(公告)日：2019-09-24
申请号：US15869733
申请日：2018-01-12
Inventor： Yujie Gao
IPC: G02F1/1362 , G02F1/1335 , G02F1/1333
Abstract: An array substrate, a display panel and a display device. The array substrate includes a base substrate including a plurality of pixel areas and a first data line on the base substrate and between adjacent pixel areas; a side slope angle of the first data line is not greater than about 60°.
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公开(公告)号：US10255985B2
公开(公告)日：2019-04-09
申请号：US15503830
申请日：2016-08-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Mingfu Han , Guangliang Shang , Yuanbo Zhang , Yujie Gao , Yan Yan , Yingmeng Miao , Seungwoo Han , Zhihe Jin , Xing Yao , Haoliang Zheng
Abstract: A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.
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公开(公告)号：US09971219B1
公开(公告)日：2018-05-15
申请号：US15704170
申请日：2017-09-14
Inventor： Deqiang Liu , Feifei Wang , Zhihua Sun , Yujie Gao , Honglin Zhang , Hebin Zhao
IPC: G02F1/1362
CPC classification number: G02F1/136286 , G02F1/1339 , G02F1/136227 , G02F2001/136222 , G02F2201/50
Abstract: Embodiments of the present disclosure provide an array substrate, a color filter substrate and a display panel. The array substrate includes: a base substrate; gate lines and data lines provided above the base substrate in a cross arrangement; and a plurality of pixel units defined by the gate lines and the data lines, each pixel unit including a pixel region and a non-pixel region. At least a portion of the gate line is located in the non-pixel region, a blocking wall region is formed in the non-pixel region and located between the portion of the gate line located in the non-pixel region and the pixel region, and a blocking wall structure for blocking movement of a spacer from the non-pixel region to the pixel region is formed in the blocking wall region.
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公开(公告)号：US09171869B1
公开(公告)日：2015-10-27
申请号：US14573732
申请日：2014-12-17
Inventor： Yujie Gao , Sangjin Park
IPC: H01L23/58 , H01L27/12 , G02F1/1368 , H01L21/66
CPC classification number: G02F1/1368 , G02F2001/136254 , H01L22/32 , H01L22/34
Abstract: The present invention provides an array substrate and a display device, to solve the problem of low testing precision due to significant difference between characteristics of TFTs in the detecting region and TFTs in the display region in the prior art. The array substrate comprises a display region and a dummy pixel region provided in the periphery of the display region, wherein, at least one detecting unit is provided in the dummy pixel region, each detecting unit comprises one second pixel unit, one thin film transistor is provided correspondingly to each second pixel unit, and respective electrodes of each thin film transistor provided correspondingly to the second pixel unit are connected to an external test device through test lines, respectively.
Abstract translation: 本发明提供了阵列基板和显示装置，以解决现有技术中检测区域中的TFT的特性与显示区域中的TFT之间的显着差异的测试精度低的问题。 阵列基板包括显示区域和设置在显示区域周边的虚拟像素区域，其中至少一个检测单元设置在虚拟像素区域中，每个检测单元包括一个第二像素单元，一个薄膜晶体管是 相应于每个第二像素单元设置，并且相应于第二像素单元设置的每个薄膜晶体管的各个电极分别通过测试线连接到外部测试装置。
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