Threshold voltage compensation circuit of thin film transistor and method for the same, shift register, and display device
    23.
    发明授权
    Threshold voltage compensation circuit of thin film transistor and method for the same, shift register, and display device 有权
    薄膜晶体管的阈值电压补偿电路及其方法,移位寄存器和显示器件

    公开(公告)号:US09418756B2

    公开(公告)日:2016-08-16

    申请号:US14235670

    申请日:2013-06-24

    CPC classification number: G11C19/28 G09G3/3241 G09G2300/043 G09G2310/0286

    Abstract: Provided are a threshold voltage compensation circuit of TFT and a method for the same, a shift register and a display device. The threshold voltage compensation circuit includes an input terminal, an output terminal connected to the source of the thin film transistor, a first resistor to a Kth resistor connected in series, and Kth connectable link and at least one first connectable link. Since a voltage dividing circuit having connectable links divides the voltage input to the source of the thin film transistor, such that the gate-source voltage of the thin film transistor can be changed by changing the voltage of the source of the thin film transistor when the voltage of the gate of the thin film transistor is maintained unchanged, so as to control a leakage current of the thin film transistor under a turn-off state, such that the thin film transistor can be turned off normally.

    Abstract translation: 提供TFT的阈值电压补偿电路及其方法,移位寄存器和显示装置。 阈值电压补偿电路包括输入端子,连接到薄膜晶体管的源极的输出端子,串联连接的第K个电阻器的第一电阻器和第K个可连接链路和至少一个第一可连接链路。 由于具有可连接链路的分压电路将输入的电压分隔成薄膜晶体管的源极,所以可以通过改变薄膜晶体管的源极的电压来改变薄膜晶体管的栅源电压 薄膜晶体管的栅极的电压保持不变,以便在关断状态下控制薄膜晶体管的漏电流,使得薄膜晶体管可以正常关断。

    Display substrate and display device

    公开(公告)号:US12165561B2

    公开(公告)日:2024-12-10

    申请号:US18396023

    申请日:2023-12-26

    Abstract: A display substrate, a method for driving the same, a display device, and a high-precision metal mask are provided. The display area includes a first display sub-area in which pixels are distributed at a high density (e.g., a high resolution), and a second display sub-area in which pixels are distributed at a low density (e.g., a low resolution), and a transition display sub-area, with a distribution density of pixels (a resolution) between the distribution density of pixels in the first display sub-area and a distribution density of pixels in the second display sub-area, is arranged between the first display sub-area and the second display sub-area.

    Display substrate and display device

    公开(公告)号:US12035599B2

    公开(公告)日:2024-07-09

    申请号:US18106721

    申请日:2023-02-07

    Abstract: An array substrate and a display device are disclosed. The array substrate includes a first block group, a second block group, a third block group and a fourth block group, a connection line between a center of the first color sub-pixel block of the first block group and a center of the first color sub-pixel block of the second block group has a first length in the first direction, a distance between center of the first color sub-pixel block of the first block group and center of the first color sub-pixel block of the third block group ranges from the first length to 3/2 of the first length, a distance between center of the first color sub-pixel block of the fourth block group and center of the first color sub-pixel block of the second block group ranges from ½ of the first length to the first length.

    Pixel circuit and driving method therefor, and display apparatus

    公开(公告)号:US12002425B2

    公开(公告)日:2024-06-04

    申请号:US18038690

    申请日:2020-11-30

    Abstract: Provided are a pixel circuit and a driving method therefor, and a display apparatus. The pixel circuit includes a drive transistor, a reset circuit, a data writing circuit, a storage capacitor circuit, a threshold value compensation circuit, a conduction control circuit, a light-emitting control circuit, and a light-emitting device; the conduction control circuit is configured to: conduct the threshold value compensation circuit with the gate of the drive transistor, and conduct the reset circuit with the gate of the drive transistor at the reset stage, the threshold value detecting stage and the data writing stage; and cut off a conducting state of the threshold value compensation circuit with the gate of the drive transistor, and cut off a conducting state of the reset circuit with the gate of the drive transistor at the driving stage; where the conduction control circuit includes an oxide semiconductor thin film transistor.

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