公开(公告)号：US20090023267A1

公开(公告)日：2009-01-22

申请号：US12234280

申请日：2008-09-19

申请人： Nicolas Daval ,  Sebastien Kerdiles ,  Cecile Aulnette

发明人： Nicolas Daval ,  Sebastien Kerdiles ,  Cecile Aulnette

IPC分类号： H01L21/762

CPC分类号： H01L21/76254 ,  H01L21/31055 ,  H01L21/31116

摘要： A method for reducing roughness of an exposed surface of an insulator layer on a substrate, by depositing an insulator layer on a substrate wherein the insulator layer includes an exposed rough surface opposite the substrate, and then smoothing the exposed rough surface of the insulator layer by exposure to a gas plasma in a chamber. The chamber contains therein a gas at a pressure of greater than 0.25 Pa but less than 30 Pa, and the gas plasma is created using a radiofrequency generator applying to the insulator layer a power density greater than 0.6 W/cm2 but less than 10 W/cm2 for at least 10 seconds to less than 200 seconds. Substrate bonding and layer transfer may be carried out subsequently to transfer the thin layer of substrate and the insulator layer to a second substrate.

摘要翻译： 一种通过在衬底上沉积绝缘体层来减小衬底上的绝缘体层的暴露表面的粗糙度的方法，其中绝缘体层包括与衬底相对的暴露的粗糙表面，然后通过 暴露于室内的气体等离子体。 该室包含大于0.25Pa但小于30Pa的压力的气体，并且使用射频发生器产生气体等离子体，所述射频发生器施加到绝缘体层的功率密度大于0.6W / cm 2但小于10W / cm2至少10秒至小于200秒。 衬底接合和层转移可以随后进行以将衬底和绝缘体层的薄层转移到第二衬底。

公开(公告)号：US07232488B2

公开(公告)日：2007-06-19

申请号：US10827437

申请日：2004-04-20

申请人： Takeshi Akatsu ,  Cecile Aulnette ,  Bruno Ghyselen

发明人： Takeshi Akatsu ,  Cecile Aulnette ,  Bruno Ghyselen

IPC分类号： C30B25/04

CPC分类号： H01L21/76254 ,  C30B25/02 ,  C30B29/52 ,  Y10S117/915

摘要： The present invention relates to a method of fabrication of a substrate for an epitaxial growth. A relaxed epitaxial base layer is obtained on an auxiliary substrate. The invention allows the fabrication of substrates with a more efficient epitaxial growth of a material with a desired lattice parameter on another material with a different lattice parameter. The material can be grown with a high thermodynamic and crystallographic stability. At least a part of the epitaxial base layer is transferred onto a carrier substrate, forming a base substrate, and growing the material of the epitaxial base layer is further grown on the carrier substrate.

摘要翻译： 本发明涉及一种外延生长用基板的制造方法。 在辅助基板上获得松弛的外延基层。 本发明允许用具有不同晶格参数的另一材料上具有期望的晶格参数的材料的更有效的外延生长来制造衬底。 该材料可以以高热力学和晶体学稳定性生长。 将外延基底层的至少一部分转移到载体基板上，形成基底基板，并且在载体基板上进一步生长外延基底层的材料。

公开(公告)号：US20060088979A1

公开(公告)日：2006-04-27

申请号：US11280336

申请日：2005-11-17

申请人： Cecile Aulnette ,  Frederic Dupont ,  Carlos Mazure

发明人： Cecile Aulnette ,  Frederic Dupont ,  Carlos Mazure

IPC分类号： H01L21/30

CPC分类号： H01L21/76259 ,  H01L21/76254

摘要： A method for fabricating a semiconductor structure having a high-strained crystalline layer with a low crystal defect density is disclosed. The structure includes a substrate having a first material comprising germanium or a Group(III)-Group(V)-semiconductor or alloy thereof. In addition, a crystalline epitaxial first layer, comprising a graded buffer layer and a substantially relaxed layer, is provided. The buffer layer is sufficiently relaxed to provide relaxation of the substantially relaxed layer deposited thereon. A further layer may be provided on the first layer, and the transfer of at least the further layer is facilitated by providing a weakened zone in the first layer.

摘要翻译： 公开了一种制造具有低晶体缺陷密度的高应变晶体层的半导体结构的方法。 该结构包括具有包含锗或第（III） - （V）族半导体或其合金的第一材料的衬底。 此外，提供了包括渐变缓冲层和基本上松弛层的晶体外延第一层。 缓冲层充分松弛以提供沉积在其上的基本上松弛层的松弛。 可以在第一层上提供另外的层，并且通过在第一层中提供弱化区来​​促进至少另外的层的转移。

公开(公告)号：US20050023610A1

公开(公告)日：2005-02-03

申请号：US10700896

申请日：2003-11-03

申请人： Bruno Ghyselen ,  Cecile Aulnette ,  Olivier Rayssac

发明人： Bruno Ghyselen ,  Cecile Aulnette ,  Olivier Rayssac

IPC分类号： H01L21/762 ,  H01L27/01

CPC分类号： H01L21/76251

摘要： A semiconductor-on-insulator structure for electronics, optics or optoelectronics, in which a semiconductor layer includes desirable elastic constraints. The structure includes a substrate, an insulating layer on the substrate, and a semiconductor layer on the insulating layer. The semiconductor layer has elastic constraints, and the insulating layer is made of an electrically insulating material having a viscosity temperature TG that is sufficiently high so as to protect the semiconductor layer from loss of the elastic constraints when the structure is exposed to a temperature of about 950° C. or more. Also described is a process for producing such a semiconductor-on-insulator structure.

摘要翻译： 用于电子，光学或光电子学的绝缘体上半导体结构，其中半导体层包括期望的弹性约束。 该结构包括衬底，衬底上的绝缘层和绝缘层上的半导体层。 半导体层具有弹性约束，并且绝缘层由具有足够高的粘度温度TG的电绝缘材料制成，以便当该结构暴露于大约的温度时保护半导体层免于弹性约束的损失 950℃以上。 还描述了一种用于制造这种绝缘体上半导体结构的方法。