Abstract:
The present invention discloses a thin-film transistor (TFT) liquid crystal display device, a substrate, and a manufacturing method thereof. The TFT substrate includes: a glass substrate and signal lines, scan lines, a first pixel electrode, a second pixel electrode, a common electrode, and the TFT. The first pixel electrode and the second pixel electrode at least partially overlap each other. The second pixel electrode forms a plurality of horizontally arranged slits and the first pixel electrode forms a hollow structure in a portion overlapping the second pixel electrode. Through the above method, the present invention increases transmittance, improve view angle color shift, and improve the quality of image.
Abstract:
A voltage detection method for detecting a voltage source includes generating a first voltage with a first negative temperature coefficient, wherein the first voltage is related to the voltage source, generating a second voltage with a second negative temperature coefficient, wherein the second voltage is related to the voltage source, and through a comparator to connect the first voltage and the second voltage, for generating a detection result voltage without temperature coefficient according to a voltage difference between the first voltage and the second voltage, and the relationship that the first negative temperature coefficient is equivalent to the second negative temperature coefficient, to perform the voltage detection.
Abstract:
A liquid crystal display having dual data signal generation mechanism is disclosed for simplifying the display structure and retaining high display quality. The liquid crystal display includes a dual data signal generator, a preliminary data line, a first data line, a second data line, and a pixel unit. The dual data signal generator functions to convert a preliminary data signal, received from the preliminary data line, into a first data signal and a second data signal. The first and second data signals are furnished to the first and second data lines respectively. The pixel unit includes a first sub-pixel unit and a second sub-pixel unit. The first sub-pixel unit is coupled to the first data line for receiving the first data signal. The second sub-pixel unit is coupled to the second data line for receiving the second data signal.
Abstract:
The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.
Abstract:
The present invention discloses an apparatus for applying curing voltages to a liquid crystal substrate. The apparatus includes a plurality of probes, a detecting unit, and an alarm unit. The probes are utilized to apply a voltage to the liquid crystal substrate. The detecting unit is electrically coupled to the probes for determining whether the curing voltages are within a threshold range. The alarm unit is electrically coupled to the detecting unit for giving an alarm prompt when the voltage is not within the threshold range, so as to remind a person without delay. Therefore, the curing voltage applying apparatus of the present invention is capable of increasing product yield, so as to reduce production costs.
Abstract:
The present disclosure provides a method of improving a layer to layer overlay error by an electron beam lithography system. The method includes generating a smart boundary of two subfields at the first pattern layer and obeying the smart boundary at all consecutive pattern layers. The same subfield is exposed by the same electron beam writer at all pattern layers. The overlay error caused by the different electron beam at different layer is improved.
Abstract:
The present disclosure provides a method of improving a layer to layer overlay error by an electron beam lithography system. The method includes generating a smart boundary of two subfields at the first pattern layer and obeying the smart boundary at all consecutive pattern layers. The same subfield is exposed by the same electron beam writer at all pattern layers. The overlay error caused by the different electron beam at different layer is improved.
Abstract:
A LCD panel includes a gate driver, an active-matrix array and a switching circuit. The gate driver is disposed on a thin film transistor substrate, and includes a shift register, wherein the shift register has plural output terminals for successively outputting plural gate driving signals. The active-matrix array is disposed on the thin film transistor substrate, and includes plural gate lines, wherein the gate lines are connected with the output terminals of the shift register. The switching circuit is disposed on the thin film transistor substrate, and includes plural switching units, wherein each of the switching units has a first terminal electrically connected with one of the output terminals of the shift register, a control terminal electrically connected with a first input pad, and a second terminal electrically connected with a second input pad.