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    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY
    1.
    发明申请
    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY 有权
    E-BEAM LITHOGRAPHY的高效扫描

    公开(公告)号：US20130320243A1

    公开(公告)日：2013-12-05

    申请号：US13484524

    申请日：2012-05-31

    申请人： Cheng-Hung Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen ,  Burn Jeng Lin

    发明人： Cheng-Hung Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen ,  Burn Jeng Lin

    IPC分类号： G21K5/10

    CPC分类号： H01J37/3174 ,  B82Y10/00 ,  B82Y40/00 ,  H01J2237/31761

    摘要： The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    摘要翻译： 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度（MSSW）扫描晶片。 通过限制集成电路（IC）场尺寸以允许MSSW覆盖整个场，MSSW被应用于减小晶片的扫描通道，从而增加吞吐量。 当用MSSW扫描晶片时，下一个扫描通道数据可以重新排列并加载到存储器缓冲器中。 因此，一旦一个扫描通道完成，读取存储器缓冲器中的下一个扫描通道数据进行扫描。

    Efficient scan for E-beam lithography
    2.
    发明授权
    Efficient scan for E-beam lithography 有权
    电子束光刻的高效扫描

    公开(公告)号：US08987689B2

    公开(公告)日：2015-03-24

    申请号：US13484524

    申请日：2012-05-31

    申请人： Cheng-Hung Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen ,  Burn Jeng Lin

    发明人： Cheng-Hung Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen ,  Burn Jeng Lin

    IPC分类号： A61N5/00

    CPC分类号： H01J37/3174 ,  B82Y10/00 ,  B82Y40/00 ,  H01J2237/31761

    摘要： The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    摘要翻译： 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度（MSSW）扫描晶片。 通过限制集成电路（IC）场尺寸以允许MSSW覆盖整个场，MSSW被应用于减小晶片的扫描通道，从而增加吞吐量。 当用MSSW扫描晶片时，可以将下一个扫描通道数据重新排列并加载到存储器缓冲器中。 因此，一旦一个扫描通道完成，读取存储器缓冲器中的下一个扫描通道数据进行扫描。

    Data process for E-beam lithography
    3.
    发明授权
    Data process for E-beam lithography 有权
    电子束光刻数据处理

    公开(公告)号：US08563224B1

    公开(公告)日：2013-10-22

    申请号：US13487850

    申请日：2012-06-04

    申请人： Cheng-Hung Chen ,  Pei-Shiang Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen

    发明人： Cheng-Hung Chen ,  Pei-Shiang Chen ,  Shih-Chi Wang ,  Jeng-Horng Chen

    IPC分类号： G03C5/00 ,  G03F1/20

    CPC分类号： G06F17/50 ,  G03C5/00 ,  G03F1/20 ,  H01J2237/31762 ,  H01J2237/31764 ,  H01J2237/31769 ,  Y10S430/143

    摘要： The present disclosure provides a dithering method of increasing wafer throughput by an electron beam lithography system. The dithering method generates an edge map from a vertex map. The vertex map is generated from an integrated circuit design layout (such as an original pattern bitmap). A gray map (also referred to as a pattern gray map) is also generated from the integrated circuit design layout. By combining the edge map with the gray map, a modified integrated circuit design layout (modified pattern bitmap) is generated for use by the electron beam lithography system.

    摘要翻译： 本公开提供了通过电子束光刻系统增加晶片生产量的抖动方法。 抖动方法从顶点图生成边缘图。 顶点图是从集成电路设计布局（如原始图案位图）生成的。 也从集成电路设计布局生成灰色地图（也称为图案灰度图）。 通过将边缘图与灰度图组合，生成修改后的集成电路设计布局（修改图案位图），供电子束光刻系统使用。

    Geometric pattern data quality verification for maskless lithography
    4.
    发明授权
    Geometric pattern data quality verification for maskless lithography 有权
    无掩模光刻的几何图形数据质量验证

    公开(公告)号：US08601407B2

    公开(公告)日：2013-12-03

    申请号：US13217345

    申请日：2011-08-25

    申请人： Hung-Chun Wang ,  Pei-Shiang Chen ,  Tzu-Chin Lin ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Jeng-Horng Chen ,  Wen-Chun Huang ,  Ru-Gun Liu

    发明人： Hung-Chun Wang ,  Pei-Shiang Chen ,  Tzu-Chin Lin ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Jeng-Horng Chen ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC分类号： G06F17/50

    CPC分类号： G03F7/2059

    摘要： Provided is a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.

    摘要翻译： 提供了进行无掩模光刻处理的方法。 该方法包括提供接近校正模式。 该方法包括基于接近校正图案生成变形图案。 该方法包括对接近校正图案执行第一卷积处理以产生第一邻近校正图案轮廓。 该方法包括处理第一接近校正图案轮廓以产生第二邻近校正图案轮廓。 该方法包括对变形图案执行第二卷积处理以产生第一变形图案轮廓。 该方法包括处理第一变形图案轮廓以产生第二变形图案轮廓。 该方法包括识别第二接近校正图案轮廓和第二变形图案轮廓之间的不匹配。 该方法包括响应于识别确定变形图案是否是光刻刻画的。

    GEOMETRIC PATTERN DATA QUALITY VERIFICATION FOR MASKLESS LITHOGRAPHY
    5.
    发明申请
    GEOMETRIC PATTERN DATA QUALITY VERIFICATION FOR MASKLESS LITHOGRAPHY 有权
    几何图形数据质量验证用于MASKLESS LITHOGRAPHY

    公开(公告)号：US20130055173A1

    公开(公告)日：2013-02-28

    申请号：US13217345

    申请日：2011-08-25

    申请人： Hung-Chun Wang ,  Pei-Shiang Chen ,  Tzu-Chin Lin ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Jeng-Horng Chen ,  Wen-Chun Huang ,  Ru-Gun Liu

    发明人： Hung-Chun Wang ,  Pei-Shiang Chen ,  Tzu-Chin Lin ,  Cheng-Hung Chen ,  Shih-Chi Wang ,  Nian-Fuh Cheng ,  Jeng-Horng Chen ,  Wen-Chun Huang ,  Ru-Gun Liu

    IPC分类号： G06F17/50

    CPC分类号： G03F7/2059

    摘要： The present disclosure involves a method of performing a maskless lithography process. The method includes providing a proximity correction pattern. The method includes generating a deformed pattern based on the proximity correction pattern. The method includes performing a first convolution process to the proximity correction pattern to generate a first proximity correction pattern contour. The method includes processing the first proximity correction pattern contour to generate a second proximity correction pattern contour. The method includes performing a second convolution process to the deformed pattern to generate a first deformed pattern contour. The method includes processing the first deformed pattern contour to generate a second deformed pattern contour. The method includes identifying mismatches between the second proximity correction pattern contour and the second deformed pattern contour. The method includes determining whether the deformed pattern is lithography-ready in response to the identifying.

    摘要翻译： 本公开涉及执行无掩模光刻工艺的方法。 该方法包括提供接近校正模式。 该方法包括基于接近校正图案生成变形图案。 该方法包括对接近校正图案执行第一卷积处理以产生第一邻近校正图案轮廓。 该方法包括处理第一接近校正图案轮廓以产生第二邻近校正图案轮廓。 该方法包括对变形图案执行第二卷积处理以产生第一变形图案轮廓。 该方法包括处理第一变形图案轮廓以产生第二变形图案轮廓。 该方法包括识别第二接近校正图案轮廓和第二变形图案轮廓之间的不匹配。 该方法包括响应于识别确定变形图案是否是光刻刻画的。

    Level adjustment systems and adjustable pin chuck thereof
    8.
    发明授权
    Level adjustment systems and adjustable pin chuck thereof 失效
    液位调节系统及其可调针式卡盘

    公开(公告)号：US07659964B2

    公开(公告)日：2010-02-09

    申请号：US11390944

    申请日：2006-03-28

    申请人： Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Jeng-Horng Chen

    发明人： Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Jeng-Horng Chen

    IPC分类号： G03B27/58

    CPC分类号： H01L21/6838 ,  H01L21/67259 ,  H01L21/67288 ,  H01L21/68742

    摘要： A level adjustment system. The level adjustment system includes an adjustable pin chuck, an evacuation device, a level detection device and a length control device. The adjustable pin chuck includes a base and a variable pin to support a substrate. The base includes a recess and an evacuation channel connected thereto. The variable pin is disposed in the recess. The evacuation device is connected to the evacuation channel to evacuate the recess, such that the substrate is attached to the base and variable pin. The level detection device is disposed on the adjustable pin chuck to detect the horizontality of a target surface of the substrate. The length control device is electrically connected to the level detection device and variable pin. The length control device changes the length of the variable pin to adjust level of the target surface of the substrate according to the detected horizontality.

    摘要翻译： 水平调整系统。 液位调节系统包括可调节销卡盘，排气装置，液位检测装置和长度控制装置。 可调销卡盘包括基座和可变销以支撑基板。 基座包括与其连接的凹部和排气通道。 可变销设置在凹槽中。 排气装置连接到排气通道以排出凹部，使得基板附接到基座和可变销。 电平检测装置设置在可调节销卡盘上以检测基板的目标表面的水平度。 长度控制装置电连接到电平检测装置和可变引脚。 长度控制装置根据检测到的水平度改变可变销的长度，以调整基板的目标表面的水平。

    System and Method for Direct Writing to a Wafer
    9.
    发明申请
    System and Method for Direct Writing to a Wafer 有权
    直接写入晶片的系统和方法

    公开(公告)号：US20090268184A1

    公开(公告)日：2009-10-29

    申请号：US12203494

    申请日：2008-09-03

    申请人： Burn Jeng Lin ,  Jeng-Horng Chen ,  Shy-Jay Lin ,  Tsai-Sheng Gau

    发明人： Burn Jeng Lin ,  Jeng-Horng Chen ,  Shy-Jay Lin ,  Tsai-Sheng Gau

    IPC分类号： G03B27/54

    CPC分类号： G03F7/70383 ,  B82Y10/00 ,  B82Y40/00 ,  H01J37/3174

    摘要： A direct-write (DW) exposure system is provided which includes a stage for holding a substrate and configured to scan the substrate along an axis during exposure, a data processing module for processing pattering data and generating instructions associated with the patterning data, and an exposure module that includes a plurality of beams that are focused onto the substrate such that the beams cover a width that is larger than a width of a field size and a beam controller that controls the plurality of beams in accordance with the instructions as the substrate is scanned along the axis. The widths are in a direction different from the axis.

    摘要翻译： 提供了一种直接写入（DW）曝光系统，其包括用于保持衬底并被配置为在曝光期间沿着轴扫描衬底的台，用于处理图案数据并产生与图案形成数据相关联的指令的数据处理模块，以及 曝光模块，其包括聚焦在基板上的多个光束，使得光束覆盖大于场大小的宽度的宽度;以及根据作为衬底的指令来控制多个光束的光束控制器 沿轴扫描。 宽度在与轴不同的方向。

    High-volume manufacturing massive e-beam maskless lithography system
    10.
    发明授权
    High-volume manufacturing massive e-beam maskless lithography system 有权
    大批量生产大规模电子束无掩模光刻系统

    公开(公告)号：US08143602B2

    公开(公告)日：2012-03-27

    申请号：US12411229

    申请日：2009-03-25

    申请人： Jeng-Horng Chen ,  Shy-Jay Lin ,  Burn Jeng Lin

    发明人： Jeng-Horng Chen ,  Shy-Jay Lin ,  Burn Jeng Lin

    IPC分类号： G21K5/08

    CPC分类号： G03F7/70275 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/70291 ,  G03F7/70508 ,  H01J37/3177 ,  H01J2237/31762

    摘要： The present disclosure provides a maskless lithography apparatus. The apparatus includes a plurality of writing chambers, each including: a wafer stage operable to secure a wafer to be written and a multi-beam module operable to provide multiple radiation beams for writing the wafer; an interface operable to transfer wafers between each of the writing chambers and a track unit for processing an imaging layer to the wafers; and a data path operable to provide a set of circuit pattern data to each of the multiple radiation beams in each of the writing chambers.

    摘要翻译： 本公开提供一种无掩模光刻设备。 该装置包括多个写入室，每个写入室包括：可操作以固定要写入的晶片的晶片台和可操作以提供用于写入晶片的多个辐射束的多光束模块; 可操作以在每个写入室之间传送晶片的接口和用于将成像层处理到晶片的轨道单元; 以及数据路径，其可操作以向每个写入室中的每个多个辐射束提供一组电路图案数据。