Disk drive suspension via formation using a tie layer and product
    22.
    发明授权
    Disk drive suspension via formation using a tie layer and product 有权
    通过使用连接层和产品的形成的磁盘驱动器悬架

    公开(公告)号:US07781679B1

    公开(公告)日:2010-08-24

    申请号:US11340298

    申请日:2006-01-26

    Abstract: A disk drive suspension interconnect, and method therefor. The interconnect has a metal grounding layer, a metal conductive layer and an insulative layer between the metal grounding layer and the conductive metal layer. A circuit component such as a slider is electrically connected to the conductive layer along a grounding path from the circuit component and the conductive layer to the metal grounding layer through an aperture in the insulative layer. For improved electrical connection a tie layer is provided through the insulative layer onto the grounding layer in bonding relation with the ground layer. A conductor is deposited onto both the conductive metal layer and the tie layer in conductive metal layer and tie layer bonding relation, and the circuit component is thus bonded to the grounding layer by the conductor.

    Abstract translation: 磁盘驱动器悬挂互连及其方法。 互连在金属接地层和导电金属层之间具有金属接地层,金属导电层和绝缘层。 诸如滑块的电路部件沿着从电路部件和导电层到金属接地层的通过绝缘层的孔的接地路径电连接到导电层。 为了改善电连接,通过绝缘层将接合层提供到与接地层结合的接地层上。 导电体以导电金属层和连接层结合关系沉积在导电金属层和连接层两者上,并且电路部件因此被导体结合到接地层。

    Method and system for progressive clock tree or mesh construction concurrently with physical design
    23.
    发明授权
    Method and system for progressive clock tree or mesh construction concurrently with physical design 有权
    与物理设计同时进行的时钟树或网格构造的方法和系统

    公开(公告)号:US06651232B1

    公开(公告)日:2003-11-18

    申请号:US09186430

    申请日:1998-11-05

    CPC classification number: G06F1/10 G06F17/5077

    Abstract: Progressively optimized clock tree/mesh construction is performed concurrently with placement of all remaining objects. Clock tree/mesh is specified loosely for initial placement, then followed by progressive detailed placement. In particular, preferred approach provides automated and reliable solution to clock tree/mesh construction, occuring concurrently with placement process so that clock tree wiring and buffering considers and influences placement and wiring of all other objects, such as logic gates, memory elements, macrocells, etc. Hence, in this concurrent manner, clock tree/mesh pre-wiring and pre-buffering may be based on construction of approximate clock tree using partitioning information only, i.e., prior to object placement. Further, present approach provides modified DME-based clock tree topology construction without meandering, and recursive algorithm for buffered clock tree construction.

    Abstract translation: 逐渐优化的时钟树/网格构建与所有剩余对象的放置同时执行。 时钟树/网格被松散地指定用于初始放置,然后是渐进的详细放置。 特别地,优选的方法为时钟树/网格构造提供了自动化和可靠的解决方案,与布置过程同时发生,使得时钟树布线和缓冲考虑并影响所有其他对象(诸如逻辑门,存储器元件,宏单元)的布局和布线, 因此,以这种并发方式,时钟树/网格预接线和预缓冲可以基于仅使用分区信息(即,在对象放置之前)构建近似时钟树。 此外,目前的方法提供了基于改进的基于DME的时钟树拓扑构造而不进行曲折,并且缓冲时钟树构建的递归算法。

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