公开(公告)号：US20240357736A1

公开(公告)日：2024-10-24

申请号：US18684457

申请日：2022-08-15

Applicant: HITACHI ASTEMO, LTD.

Inventor： Takanori SEKIGUCHI ,  Takayuki DEGUCHI

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K1/0268 ,  H05K1/113 ,  H05K3/429 ,  H05K2201/09509 ,  H05K2201/09572 ,  H05K2201/09827 ,  H05K2203/045 ,  H05K2203/1121

Abstract: An electronic component is mounted on a surface layer of a multilayer substrate constituting a wiring substrate, and a signal wire of the surface layer is electrically connected to the electronic component. A conductor pad for contact with an inspection probe is composed of a via and a solder filled in an internal opening portion thereof. The via has a laser-processed taper-shaped hole with a metal-plated inner peripheral surface and connects the inter-layer connection between the signal wire of the surface layer and a signal wire of the inner layer. The solder is filled in the opening portion of the via by filling, heating and melting solder material therein. Since the peripheral edge portion is solidified first at the time of the cooling and the solidification, the middle part is recessed compared to the peripheral edge portion. This ensures a reliable contact of the inspection probe.

公开(公告)号：US12114425B2

公开(公告)日：2024-10-08

申请号：US17942442

申请日：2022-09-12

Applicant: Huawei Technologies Co., Ltd.

Inventor： Guodong Zhang ,  Chong Chen ,  Jian Zhang ,  Shaoyong Xiang ,  Zhijun Qu ,  Changxing Sun

IPC: H05K1/00 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/116 ,  H05K1/184 ,  H05K2201/09509 ,  H05K2201/10901

Abstract: A signal transmission structure includes a circuit board, a chip, and a cable assembly. The chip is assembled on one side of the circuit board, and the cable assembly is assembled on the other side of the circuit board. The cable assembly includes a cable, and the circuit board includes a plurality of conductive holes. The chip is electrically connected to the cable of the cable assembly using the conductive hole to transmit a signal of the chip using the cable.

公开(公告)号：US20240334613A1

公开(公告)日：2024-10-03

申请号：US18611230

申请日：2024-03-20

Applicant: AT&S (Chongqing) Company Limited

Inventor： JyunMin WANG ,  James FUNG ,  Brance ZHOU ,  Stella LI ,  Vivi WEI ,  Cain DUAN ,  Melody XIE ,  Lucas ZHOU

IPC: H05K3/26 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/42

CPC classification number: H05K3/26 ,  H01L21/4846 ,  H01L23/49838 ,  H05K1/115 ,  H05K3/421 ,  H05K2201/09509 ,  H05K2203/0776 ,  H05K2203/143 ,  H05K2203/163

Abstract: A component carrier and a method of manufacturing the component carrier are presented. The component carrier includes a stack with a plurality of electrically insulating layer structures and one or more electrically conductive layer structures, the one or more electrically conductive layer structures include two opposed conductive surfaces; a plurality of first vias, formed at a front side of the stack, the plurality of first vias are connected to one of the two opposed conductive surfaces through a respective first baseline-etch surface; and a plurality of second vias, formed at a back side of the stack, the front side is opposed to the back side, wherein the plurality of second vias is connected to the other one of the two opposed conductive surfaces through a respective second baseline-etch surface. The total area defined by the first baseline-etch surfaces is higher than the total area defined by the second baseline-etch surfaces and the depth of at least one of the first baseline-etch surfaces is lower than the depth of at least one of the second baseline-etch surfaces.

公开(公告)号：US12089325B2

公开(公告)日：2024-09-10

申请号：US17596257

申请日：2020-06-04

Applicant: LG INNOTEK CO., LTD.

Inventor： Jae Hwa Kim ,  Seung Yul Shin ,  Sung Wuk Ryu

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0296 ,  H05K1/115 ,  H05K2201/09036 ,  H05K2201/09509 ,  H05K2201/09854

Abstract: A printed circuit board according to an embodiment includes a first insulating layer; a second insulating layer disposed on the first insulating layer; and a cavity formed in the first and second insulating layers; wherein the cavity includes a first portion formed in the second insulating layer; and a second portion formed in the first insulating layer; wherein the first portion has a first cross-sectional shape, and wherein the second part has a second cross-sectional shape different from the first cross-sectional shape.

公开(公告)号：US20240282687A1

公开(公告)日：2024-08-22

申请号：US18650005

申请日：2024-04-29

Applicant: Unimicron Technology Corp.

Inventor： Chih-Chiang Lu ,  Hsin-Ning Liu ,  Jun-Rui Huang ,  Pei-Wei Wang ,  Ching Sheng Chen ,  Shih-Lian Cheng

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/42 ,  H05K3/46

CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H05K1/0222 ,  H05K3/0094 ,  H05K3/429 ,  H05K3/4614 ,  H05K3/4623 ,  H01L24/16 ,  H01L2224/16227 ,  H05K2201/09509 ,  H05K2201/0959

Abstract: A manufacturing method of the circuit board includes the following steps. A metal layer, a first substrate, a second substrate, and a third substrate are laminated. Multiple blind holes and a through hole are formed. A conductive material layer is formed, which covers the metal layer, the conductive layer of the third substrate, and an inner wall of the through hole, and fills the blind holes to define multiple conductive holes. The conductive material layer, the metal layer, and the conductive layer are patterned to form a first external circuit layer located on the first substrate and electrically connected to the conductive pillars, and a second external circuit layer located on the insulating layer and electrically connected to the conductive holes, and define a conductive through hole structure connecting the first external circuit layer and the second external circuit layer and located in the through hole.

公开(公告)号：US12028990B2

公开(公告)日：2024-07-02

申请号：US17371327

申请日：2021-07-09

Applicant: STEMCO CO., LTD.

Inventor： Sung Jin Lee ,  Young Jun Kim ,  Su Jeong Shin

IPC: H05K1/09 ,  H05K3/28 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K3/4644 ,  H05K1/09 ,  H05K3/282 ,  H05K3/38 ,  H05K2201/0352 ,  H05K2201/09509

Abstract: Provided are a multilayer board and a method for manufacturing same, in which a different kind of metal layer is formed between an upper metal layer and an interlayer insulating layer, the different kind of metal layer being formed only in a wiring area without being formed in a via area. The multilayer board comprises: a substrate layer; a plurality of first metal layers sequentially stacked on the substrate layer; an interlayer insulating layer formed between two different first metal layers, having a first via hole, and electrically connecting the two different first metal layers through a third metal layer formed in the first via hole; and a second metal layer formed between the upper layer of the two different first metal layers and the interlayer insulating layer.

公开(公告)号：US12022616B2

公开(公告)日：2024-06-25

申请号：US18200230

申请日：2023-05-22

Applicant: Shenzhen Newsonic Technologies Co., Ltd.

Inventor： Guojun Weng ,  Xiaolong Wang

IPC: H05K1/14 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H05K1/11 ,  H05K3/34 ,  H05K3/40

CPC classification number: H05K1/144 ,  H01L21/568 ,  H01L23/5384 ,  H01L24/16 ,  H01L25/0655 ,  H01L25/50 ,  H05K1/115 ,  H05K3/34 ,  H05K3/4038 ,  H01L2224/16227 ,  H01L2224/16238 ,  H05K2201/042 ,  H05K2201/09036 ,  H05K2201/09509 ,  H05K2201/10098 ,  H05K2201/10674 ,  H05K2201/10984

Abstract: A radio frequency front-end module, a manufacturing method thereof and a communication device are provided. The radio frequency front-end module includes a first base substrate and a metal bonding structure; a second functional substrate, including a second base substrate, a groove in the second base substrate, and a bonding metal layer; and a first radio frequency front-end component, at least partially located in the groove, the first base substrate and the second base substrate are oppositely arranged, and a surface of the second base substrate close to the first base substrate includes a groove surface inside the groove and a substrate surface outside the groove, and the bonding metal layer includes a first metal portion located on the groove surface and a second metal portion located on the substrate surface, the first radio frequency front-end component is at least partially surrounded by the first metal portion.

公开(公告)号：US20240188216A1

公开(公告)日：2024-06-06

申请号：US18285910

申请日：2022-02-14

Applicant: FICT LIMITED

Inventor： Kenji Iida ,  Norikazu Ozaki ,  Taiji Sakai ,  Takashi Nakagawa ,  Kenji Takano

IPC: H05K1/11 ,  H05K3/38 ,  H05K3/46

CPC classification number: H05K1/116 ,  H05K3/382 ,  H05K3/4652 ,  H05K3/4682 ,  H05K2201/09509 ,  H05K2201/096

Abstract: The present invention addresses the problem of providing a circuit board for which the manufacturing process is short and which has a laminate surface having uniform flatness. As a solution to the problem, this method for manufacturing a circuit board includes: manufacturing a three-layer metal (58) having, on one surface thereof, a first metal layer (26) formed in a pattern shape; manufacturing unit structures (60) each having the first metal layer (26), a cured first insulating base material (22) filled with a cured first conductive paste (32), a second metal layer (28), and a semi-cured second insulating base material (24) filled with a semi-cured second conductive paste (36); joining together the first insulating base material (22) in one unit structure (60) among a plurality of the unit structures with the second insulating base material (24) in another unit structure (60); and layering the plurality of unit structures (60).

公开(公告)号：US11842958B2

公开(公告)日：2023-12-12

申请号：US17697937

申请日：2022-03-18

Applicant: Chun-Ming Lin

Inventor： Chun-Ming Lin

IPC: H05K1/09 ,  H05K1/11 ,  H01L23/498 ,  C25D7/12 ,  H01L21/48 ,  C25D3/38 ,  H05K1/18

CPC classification number: H01L23/49866 ,  C25D3/38 ,  C25D7/12 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H05K1/09 ,  H05K1/112 ,  H05K1/18 ,  H05K2201/0332 ,  H05K2201/0364 ,  H05K2201/095 ,  H05K2201/09509

Abstract: The present disclosure provides a multilayer wiring structure, including a plurality of dielectric layers, a plurality of conductive wiring layers interleaved with the plurality of dielectric layers, wherein the plurality of conductive wiring layers includes copper-phosphorous alloys (such as Cu3P).

公开(公告)号：US20230292431A1

公开(公告)日：2023-09-14

申请号：US18121355

申请日：2023-03-14

Applicant: TTM Technologies, Inc.

Inventor： Niels Husted Kirkeby

IPC: H05K1/02 ,  H05K1/11 ,  H05K3/46

CPC classification number: H05K1/024 ,  H05K1/113 ,  H05K3/4608 ,  H05K2203/06 ,  H05K2201/09509

Abstract: A printed circuit board (PCB) core structure is provided for the transition of signals from one side of a PCB to an opposing side of the PCB. The PCB core structure may include a laminated core including an inner core including a plurality of conductive layers (N layers), a first dielectric layer, a first conductive trace disposed over the Nth conductive layer on a first side of the laminated core. The PCB core structure may also include a signal via extending from a first conductive layer to an Nth conductive layer through the laminated core, the signal via configured to connect the first conductive trace to a pin or a second conductive trace on a second side of the laminated core. The PCB core structure may also include a shielding structure surrounding the signal via and partially extending from the first conductive layer to the Nth conductive layer. The PCB core structure may also include a cavity removing a portion of the shielding structure in the Nth conductive layer and filled with a dielectric material. The cavity filled with the dielectric material prevents the first conductive trace from shorting to the shielding structure. The PCB core structure may be fabricated by using a single-lamination cycle.