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21.
公开(公告)号:US12206385B2
公开(公告)日:2025-01-21
申请号:US17862605
申请日:2022-07-12
Applicant: D-WAVE SYSTEMS INC.
Inventor: Jed D. Whittaker , Loren J. Swenson , Mark H. Volkmann
Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
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公开(公告)号:US12034404B2
公开(公告)日:2024-07-09
申请号:US17158484
申请日:2021-01-26
Applicant: D-WAVE SYSTEMS INC.
Inventor: Andrew J. Berkley , Loren J. Swenson , Mark H. Volkmann , Jed D. Whittaker , Paul I. Bunyk , Peter D. Spear , Christopher B. Rich
CPC classification number: H03B15/003 , G06N10/20 , G06N10/40 , H01P7/08 , H01P7/105 , H03H7/01 , H10N60/12 , G06N10/00 , H03B2201/02
Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.
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公开(公告)号:US20240151782A1
公开(公告)日:2024-05-09
申请号:US18517174
申请日:2023-11-22
Applicant: D-WAVE SYSTEMS INC.
Inventor: Loren J. Swenson , Emile M. Hoskinson , Mark H. Volkmann , Andrew J. Berley , George E.G. Sterling , Jed D. Whittaker
IPC: G01R33/035 , G06N10/00 , H10N60/12
CPC classification number: G01R33/0354 , G06N10/00 , H10N60/12
Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.
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公开(公告)号:US11879950B2
公开(公告)日:2024-01-23
申请号:US17054631
申请日:2019-05-16
Applicant: D-WAVE SYSTEMS INC.
Inventor: Loren J. Swenson , Emile M. Hoskinson , Mark H. Volkmann , Andrew J. Berkley , George E. G. Sterling , Jed D. Whittaker
IPC: G01R33/54 , G01R33/035 , G06N10/00 , H10N60/12
CPC classification number: G01R33/0354 , G06N10/00 , H10N60/12
Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.
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公开(公告)号:US11514223B2
公开(公告)日:2022-11-29
申请号:US17068388
申请日:2020-10-12
Applicant: D-WAVE SYSTEMS INC.
Inventor: Reza Molavi , Mark H. Volkmann , Paul I. Bunyk
IPC: G06F30/398 , G06N10/00 , G06F30/392 , G06F115/12
Abstract: Systems and methods are described to accurately extract device parameters and optimize the design of macroscopic superconducting structures, for example qubits. This method presents the advantage of reusing existing plaquettes to simulate different processor topologies. The physical elements of a qubits are extracted via plurality of plaquettes. Each plaquette contains at least one physical element of the qubit design and has two ports on each side. Each plaquette is concatenated to at least one other plaquette via two ports. The values of inductance (L), capacitance (C) and mutual inductance (M) and quantum critical point of the qubit design can be computed. Changing the physical elements of the qubit design and iterating the method allows to effortlessly refine the qubit design.
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公开(公告)号:US20220011384A1
公开(公告)日:2022-01-13
申请号:US17388545
申请日:2021-07-29
Applicant: D-WAVE SYSTEMS INC.
Inventor: Loren J. Swenson , Andrew J. Berkley , Mark H. Volkmann , George E.G. Sterling , Jed D. Whittaker
IPC: G01R33/035 , H01L39/22 , G06N10/00
Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
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公开(公告)号:US20210218367A1
公开(公告)日:2021-07-15
申请号:US17158484
申请日:2021-01-26
Applicant: D-WAVE SYSTEMS INC.
Inventor: Andrew J. Berkley , Loren J. Swenson , Mark H. Volkmann , Jed D. Whittaker , Paul I. Bunyk , Peter D. Spear , Christopher B. Rich
Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.
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公开(公告)号:US20200266234A1
公开(公告)日:2020-08-20
申请号:US16389669
申请日:2019-04-19
Applicant: D-WAVE SYSTEMS INC.
Inventor: Kelly T.R. Boothby , Loren J. Swenson , Mark H. Volkmann , Jed D. Whittaker
Abstract: Apparatus and methods advantageously provide parallel-plate capacitors in superconducting integrated circuits. A method may include forming a metal-oxide layer to overlie at least a portion of a first capacitor plate, the first capacitor plate comprising a superconductive material, and depositing a second capacitor plate to overlie at least a portion of the metal-oxide layer, the second capacitor plate comprising a superconductive material. The method may include depositing a base electrode of superconductive material to overlie at least a portion of a substrate, depositing the first capacitor plate to overlie at least a portion of the base electrode, and superconductingly electrically coupled to the base electrode, and depositing a counter electrode of superconductive material to overlie at least a portion of the second capacitor plate, the counter electrode superconductingly electrically coupled to the second capacitor plate. The superconducting integrated circuit may include a parallel-plate capacitor and a Josephson junction.
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