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    Quantum processor with instance programmable qubit connectivity
    2.
    发明授权
    Quantum processor with instance programmable qubit connectivity 有权

    公开(公告)号：US09710758B2

    公开(公告)日：2017-07-18

    申请号：US14691268

    申请日：2015-04-20

    Applicant: D-Wave Systems Inc.

    Inventor： Paul I. Bunyk ,  Mohammad H. S. Amin ,  Richard G. Harris ,  Trevor Michael Lanting ,  Mark W. Johnson ,  Jeremy P. Hilton ,  Emile M. Hoskinson

    IPC: G06F15/82 ,  G06N99/00

    CPC classification number: G06N99/002 ,  G06F15/82

    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

    SYSTEMS AND METHODS FOR ADDRESSING DEVICES IN A SUPERCONDUCTING CIRCUIT
    3.
    发明公开
    SYSTEMS AND METHODS FOR ADDRESSING DEVICES IN A SUPERCONDUCTING CIRCUIT 审中-公开

    公开(公告)号：US20240151782A1

    公开(公告)日：2024-05-09

    申请号：US18517174

    申请日：2023-11-22

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Loren J. Swenson ,  Emile M. Hoskinson ,  Mark H. Volkmann ,  Andrew J. Berley ,  George E.G. Sterling ,  Jed D. Whittaker

    IPC: G01R33/035 ,  G06N10/00 ,  H10N60/12

    CPC classification number: G01R33/0354 ,  G06N10/00 ,  H10N60/12

    Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.

    Systems and methods for addressing devices in a superconducting circuit
    4.
    发明授权
    Systems and methods for addressing devices in a superconducting circuit 有权

    公开(公告)号：US11879950B2

    公开(公告)日：2024-01-23

    申请号：US17054631

    申请日：2019-05-16

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Loren J. Swenson ,  Emile M. Hoskinson ,  Mark H. Volkmann ,  Andrew J. Berkley ,  George E. G. Sterling ,  Jed D. Whittaker

    IPC: G01R33/54 ,  G01R33/035 ,  G06N10/00 ,  H10N60/12

    CPC classification number: G01R33/0354 ,  G06N10/00 ,  H10N60/12

    Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.

    SYSTEMS AND METHODS FOR DEGENERACY MITIGATION IN A QUANTUM PROCESSOR
    6.
    发明申请
    SYSTEMS AND METHODS FOR DEGENERACY MITIGATION IN A QUANTUM PROCESSOR 有权

    公开(公告)号：US20210350269A1

    公开(公告)日：2021-11-11

    申请号：US17379172

    申请日：2021-07-19

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Andrew Douglas King ,  Alexandre Fréchette ,  Evgeny A. Andriyash ,  Trevor Michael Lanting ,  Emile M. Hoskinson ,  Mohammad H. Amin

    IPC: G06N10/00

    Abstract: Degeneracy in analog processor (e.g., quantum processor) operation is mitigated via use of floppy qubits or domains of floppy qubits (i.e., qubit(s) for which the state can be flipped with no change in energy), which can significantly boost hardware performance on certain problems, as well as improve hardware performance for more general problem sets. Samples are drawn from an analog processor, and devices comprising the analog processor evaluated for floppiness. A normalized floppiness metric is calculated, and an offset added to advance the device in annealing. Degeneracy in a hybrid computing system that comprises a quantum processor is mitigated by determining a magnetic susceptibility of a qubit, and tuning a tunneling rate for the qubit based on a tunneling rate offset determined based on the magnetic susceptibility. Quantum annealing evolution is controlled by causing the evolution to pause for a determined pause duration.

    Quantum processor with instance programmable qubit connectivity
    7.
    发明授权
    Quantum processor with instance programmable qubit connectivity 有权

    公开(公告)号：US10891554B2

    公开(公告)日：2021-01-12

    申请号：US16258082

    申请日：2019-01-25

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Richard G. Harris ,  Paul I. Bunyk ,  Mohammad H. S. Amin ,  Emile M. Hoskinson

    IPC: G06N10/00 ,  G06F15/82

    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.

    Systems and methods for addressing devices in a superconducting circuit
    8.
    发明授权
    Systems and methods for addressing devices in a superconducting circuit 有权

    公开(公告)号：US12204002B2

    公开(公告)日：2025-01-21

    申请号：US18517174

    申请日：2023-11-22

    Applicant: D-WAVE SYSTEMS INC.

    Inventor： Loren J. Swenson ,  Emile M. Hoskinson ,  Mark H Volkmann ,  Andrew J. Berkley ,  George E. G. Sterling ,  Jed D. Whittaker

    IPC: G01R33/00 ,  G01R33/035 ,  G06N10/00 ,  H10N60/12

    Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line. A low-frequency current bias may be used at room temperature to identify the presence of a DC short, an open, and/or an unexpected resistance in a superconducting resonator.

    Systems and methods for coupling qubits in a quantum processor
    9.
    发明授权
    Systems and methods for coupling qubits in a quantum processor 有权

    公开(公告)号：US11494683B2

    公开(公告)日：2022-11-08

    申请号：US16955526

    申请日：2018-12-19

    Applicant: D-Wave Systems Inc.

    Inventor： Mohammad H. Amin ,  Paul I. Bunyk ,  Trevor M. Lanting ,  Chunqing Deng ,  Anatoly Smirnov ,  Kelly T. R. Boothby ,  Emile M. Hoskinson ,  Christopher B. Rich

    IPC: H01L39/02 ,  G06N10/00 ,  H01L39/22

    Abstract: Josephson junctions (JJ) may replace primary inductance of transformers to realize galvanic coupling between qubits, advantageously reducing size. A long-range symmetric coupler may include a compound JJ (CJJ) positioned at least approximately at a half-way point along the coupler to advantageously provide a higher energy of a first excited state than that of an asymmetric long-range coupler. Quantum processors may include qubits and couplers with a non-stoquastic Hamiltonian to enhance multi-qubit tunneling during annealing. Qubits may include additional shunt capacitances, e.g., to increase overall quality of a total capacitance and improve quantum coherence. A sign and/or magnitude of an effective tunneling amplitude Δeff of a qubit characterized by a double-well potential energy may advantageously be tuned. Sign-tunable electrostatic coupling of qubits may be implemented, e.g., via resonators, and LC-circuits. YY couplings may be incorporated into a quantum anneaier (e.g., quantum processor).

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