Abstract:
A circuit arrangement includes a reverse conducting transistor having a gate electrode and a load current path between an emitter and collector electrode. The transistor is configured to allow for conducting a load current in a forward direction and in a reverse direction through the load current path and activated or deactivated by a respective signal at the gate electrode. The circuit arrangement further includes a gate control unit and a monitoring unit. The gate control unit is connected to the gate electrode and configured to deactivate the transistor or prevent an activation of the transistor via the gate electrode when the transistor is in a reverse conducting state. The monitoring unit is configured to detect a sudden rise of a collector-emitter voltage of the reverse conducting transistor which occurs, when the load current crosses zero, while the transistor is deactivated or activation is prevented by the gate control unit.
Abstract:
One embodiment provides a circuit arrangement integrated in a semiconductor body. At least one power semiconductor component integrated in the semiconductor body and having a control connection and a load connection is provided. A resistance component is thermally coupled to the power semiconductor component and likewise integrated into the semiconductor body and arranged between the control connection and the load connection of the power semiconductor component. The resistance component has a temperature-dependent resistance characteristic curve. A driving and evaluation unit is designed to evaluate the current through the resistance component or the voltage drop across the resistance component and provides a temperature signal dependent thereon.
Abstract:
A semiconductor switching arrangement includes a normally on semiconductor component of a first conduction type and a normally off semiconductor component of a second conduction type which is the complement of the first conduction type. A load path of the normally off semiconductor component is connected in series with the load path of the normally on semiconductor component. A first actuation circuit connected between the control connection of the normally on semiconductor component and a load path connection of the normally on semiconductor component. The load path connection of the normally on semiconductor component is arranged between the normally on and normally off semiconductor components. A second actuation circuit is connected between the control connection of the normally off semiconductor component and a load path connection of the normally off semiconductor component. The load path connection of the normally off semiconductor component is arranged between the normally on and normally off semiconductor components.
Abstract:
A power semiconductor assembly includes at least two bridge branches each including at least two circuit breakers connected to a phase output. Each of the circuit breakers has at least two parallel-connected switching elements integrated into a semiconductor chip. Each of the circuit breakers is arranged in a power semiconductor module and the individual power semiconductor modules are arranged adjacent to one another in a first direction. The semiconductor chips of a particular circuit breaker are arranged adjacent to one another in the corresponding power semiconductor module in a second direction extending perpendicular to the first direction.