-
公开(公告)号：US07340706B2
公开(公告)日：2008-03-04
申请号：US11239977
申请日：2005-09-30
申请人： Ilya Golubtsov , Stanislav V. Aleshin , Ranko Scepanovic , Sergei Rodin , Marina Medvedeva , Sergey V. Uzhakov , Evgueny E. Egorov , Nadya Strelkova
发明人： Ilya Golubtsov , Stanislav V. Aleshin , Ranko Scepanovic , Sergei Rodin , Marina Medvedeva , Sergey V. Uzhakov , Evgueny E. Egorov , Nadya Strelkova
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F7/705
摘要： The present invention provides a method and system for analyzing the quality of an OPC mask. The method includes receiving a target layer from a target design, receiving an OPC mask layer from the OPC mask. The method also includes classifying each cell of at least one of the target layer and the OPC mask layer as either repeating or non-repeating, and for each repeating cell, recognizing geometric points in the target layer to determine quality measuring groups. The method also includes simulating the OPC mask layer based on the quality measuring groups, measuring edge placement errors (EPEs) based on at least one of the geometric points, and providing an EPE layer representing EPEs greater than an EPE threshold.
摘要翻译： 本发明提供了一种用于分析OPC掩模的质量的方法和系统。 该方法包括从目标设计接收目标层，从OPC掩模接收OPC掩模层。 该方法还包括将目标层和OPC掩模层中的至少一个的每个单元分类为重复的或不重复的，并且对于每个重复的单元，识别目标层中的几何点以确定质量测量组。 该方法还包括基于质量测量组模拟OPC掩模层，基于至少一个几何点测量边缘放置误差（EPE），以及提供表示大于EPE阈值的EPE的EPE层。
-
公开(公告)号：US20080046764A1
公开(公告)日：2008-02-21
申请号：US11620794
申请日：2007-01-08
IPC分类号： G06F12/14
CPC分类号： G06F21/6218
摘要： A method of storing sensitive data by generating randomization values, transforming the sensitive data and the randomization values into a result, and storing separate portions of the result on at least two storage devices, such that the sensitive data cannot be disclosed if any one of the storage devices is compromised.
摘要翻译： 一种通过产生随机化值来存储敏感数据的方法，将敏感数据和随机化值变换为结果，并将结果的分离部分存储在至少两个存储设备上，使得如果敏感数据中的任何一个 存储设备受到损害。
-
23.发明申请Method and system for outputting a sequence of commands and data described by a flowchart 有权用于输出由流程图描述的命令和数据序列的方法和系统公开(公告)号：US20070169009A1
公开(公告)日：2007-07-19
申请号：US11260517
申请日：2005-10-27
IPC分类号： G06F9/45
CPC分类号： G06F8/66
摘要： The present invention is a method and system for outputting a sequence of commands and data described by a flowchart. The method includes steps as follows. A flowchart describing a sequence of commands and data is received. The flowchart includes a plurality of flowchart symbols. Each of the plurality of flowchart symbols is assigned a ROM (read only memory) record. Assigned ROM records are stored in a ROM. A processor is generated to include the ROM, wherein the processor receives as input a CLOCK signal, a RESET signal, an ENABLE signal and N binary inputs x1, x2, . . . xN, and outputs the sequence of commands and data.
摘要翻译： 本发明是用于输出由流程图描述的命令和数据序列的方法和系统。 该方法包括以下步骤。 接收描述命令和数据序列的流程图。 流程图包括多个流程图符号。 多个流程图符号中的每一个被分配有ROM（只读存储器）记录。 分配的ROM记录存储在ROM中。 产生处理器以包括ROM，其中处理器接收CLOCK信号，RESET信号，ENABLE信号和N个二进制输入x 1，x 2， 。 。 。 并且输出命令和数据的序列。
-
公开(公告)号：US20070143648A1
公开(公告)日：2007-06-21
申请号：US11311388
申请日：2005-12-19
IPC分类号： G11C29/00
CPC分类号： G11C5/04
摘要： A memory timing model is provided, which includes an address input, a multiple-bit data input, a multiple-bit data output, a capacity C and a width N. N one-bit wide memory modules are instantiated in parallel with one another between respective bits of the data input and the data output. Each memory module has a capacity of C bits addressed by the address input.
摘要翻译： 提供了存储器定时模型，其包括地址输入，多位数据输入，多位数据输出，容量C和宽度N.N个1位宽存储器模块彼此并行地实例化 数据输入的各个位和数据输出。 每个存储器模块具有通过地址输入寻址的C位的容量。
-
公开(公告)号：US07231383B2
公开(公告)日：2007-06-12
申请号：US10137874
申请日：2002-05-01
CPC分类号： G06F9/342 , Y10S707/99931 , Y10S707/99933 , Y10S707/99934
摘要： A search engine architecture substitutes short indices for large data widths, thereby reducing widths required for input to and output from the search engine. The search engine system comprises a search engine responsive to an input address to access an index in the search engine. The index has a width no greater than logarithm on base 2 of the search engine capacity, thereby permitting the search engine to be embodied in an IC chip of reduced area. A driver responds to input commands and to the search engine status to manage indices in the search engine and enable the memory to access its addressable locations based on indices in the search engine.
摘要翻译： 搜索引擎架构将短索引替换为大数据宽度，从而减少输入到搜索引擎输出所需的宽度。 搜索引擎系统包括响应于输入地址以访问搜索引擎中的索引的搜索引擎。 该索引具有不大于搜索引擎容量的基础2上的对数的宽度，从而允许搜索引擎体现在缩小区域的IC芯片中。 驱动程序响应输入命令和搜索引擎状态来管理搜索引擎中的索引，并使内存能够基于搜索引擎中的索引访问其可寻址位置。
-
公开(公告)号：US20070079277A1
公开(公告)日：2007-04-05
申请号：US11239977
申请日：2005-09-30
申请人： Ilya Golubtsov , Stanislav Aleshin , Ranko Scepanovic , Sergei Rodin , Marina Medvedeva , Sergey Uzhakov , Evgueny Egorov , Nadya Strelkova
发明人： Ilya Golubtsov , Stanislav Aleshin , Ranko Scepanovic , Sergei Rodin , Marina Medvedeva , Sergey Uzhakov , Evgueny Egorov , Nadya Strelkova
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F7/705
摘要： The present invention provides a method and system for analyzing the quality of an OPC mask. The method includes receiving a target layer from a target design, receiving an OPC mask layer from the OPC mask. The method also includes classifying each cell of at least one of the target layer and the OPC mask layer as either repeating or non-repeating, and for each repeating cell, recognizing geometric points in the target layer to determine quality measuring groups. The method also includes simulating the OPC mask layer based on the quality measuring groups, measuring edge placement errors (EPEs) based on at least one of the geometric points, and providing an EPE layer representing EPEs greater than an EPE threshold.
摘要翻译： 本发明提供了一种用于分析OPC掩模的质量的方法和系统。 该方法包括从目标设计接收目标层，从OPC掩模接收OPC掩模层。 该方法还包括将目标层和OPC掩模层中的至少一个的每个单元分类为重复的或不重复的，并且对于每个重复的单元，识别目标层中的几何点以确定质量测量组。 该方法还包括基于质量测量组模拟OPC掩模层，基于至少一个几何点测量边缘放置误差（EPE），以及提供表示大于EPE阈值的EPE的EPE层。
-
公开(公告)号：US07200826B2
公开(公告)日：2007-04-03
申请号：US11000104
申请日：2004-11-30
IPC分类号： G06F17/50
CPC分类号： G06F17/5031
摘要： A method of generating a timing model for a customer memory configuration, by generating a plurality of template memory netlists for a given RRAM design. Timing models for the template memory netlists are produced and stored in a first database. The template memory netlists are stored in a second database. A netlist for the customer memory configuration is generated and compared to the template memory netlists to find a match. When a match is found, one of the timing models that is associated with the matching template memory netlist is used as the timing model for the customer memory configuration. When a match is not found, two of the template memory netlists that bound the customer netlist are found, according to at least one parameter, and the timing model for the customer memory configuration is interpolated based on the two bounding template memory netlists.
摘要翻译： 一种通过为给定的RRAM设计生成多个模板存储器网表来为客户存储器配置生成定时模型的方法。 生成模板内存网表的时序模型并将其存储在第一个数据库中。 模板内存网表存储在第二个数据库中。 生成客户内存配置的网表，并与模板内存网表进行比较以查找匹配项。 当找到匹配时，将与匹配模板内存网表相关联的时序模型之一用作客户内存配置的时间模型。 当没有找到匹配时，根据至少一个参数找到绑定客户网表的两个模板存储器网表，并且基于两个边界模板存储器网表来内插客户存储器配置的定时模型。
-
公开(公告)号：US07050582B1
公开(公告)日：2006-05-23
申请号：US09883733
申请日：2001-06-18
CPC分类号： H04L9/0668
摘要： A method of defining a transformation between an input signal and an output signal. The transformation may implement a pseudo-random one-to-one function that may be implemented in hardware and/or software or modeled in software. The method may comprise the steps of (A) allocating the input signal among a plurality of block input signals, (B) establishing a plurality of transfer functions where each transfer function may be configured to present a plurality of unique symbols as a block output signal responsive to said block input signal, and (C) concatenating the block output signals to form the output signal.
摘要翻译： 一种定义输入信号和输出信号之间变换的方法。 该转换可以实现可以在硬件和/或软件中实现或以软件建模的伪随机一对一功能。 该方法可以包括以下步骤：（A）在多个块输入信号之间分配输入信号，（B）建立多个传递函数，其中每个传递函数可被配置为呈现多个唯一符号作为块输出信号 响应于所述块输入信号，以及（C）串联块输出信号以形成输出信号。
-
公开(公告)号：US20060107247A1
公开(公告)日：2006-05-18
申请号：US10990589
申请日：2004-11-17
CPC分类号： G06F17/5072
摘要： A memory generation and placement flow system that receives a customer memory design and places the customer memory design within a customizable standardized integrated circuit design. The memory generation and placement flow system includes a memory librarian tool, a memory estimator tool, and a memory placer tool.
摘要翻译： 存储器生成和放置流程系统，其接收客户存储器设计，并将客户存储器设计放置在可定制的标准化集成电路设计中。 存储器生成和放置流程系统包括存储库管理器工具，存储器估计器工具和存储器存储器工具。
-
30.发明授权Universal gates for ICs and transformation of netlists for their implementation 失效IC的通用门户，以及网路数据库的实施转型公开(公告)号：US06988252B2
公开(公告)日：2006-01-17
申请号：US10633856
申请日：2003-08-04
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： An original netlist is transformed to one employing universal gates. A negation net is created for each net coupled to an input or output of each gate and an input of each inverter in the original net. Each gate is removed from the original netlist and a universal gate is inserted so that the nets previously coupled to the inputs and output of the removed gate and a negation of those nets are coupled to the inputs and outputs of the inserted universal gate in a selected arrangement. Each inverter is removed from the original netlist and the net previously coupled to the input of the inverter is negated. A universal gate comprises gates performing anding and oring functions whose inputs and outputs are selectively coupled to the nets of the original netlist, and their negations.
摘要翻译： 一个原始网表被转换为一个采用通用门。 针对耦合到每个门的输入或输出的每个网络以及原始网络中每个逆变器的输入产生一个否定网。 每个门从原始网表移除，并且插入通用门，使得先前耦合到去除的门的输入和输出的网络以及这些网络的否定被耦合到所选择的插入的通用门的输入和输出 安排。 每个逆变器从原始网表中移除，并且先前耦合到逆变器输入端的网络被否定。 通用门包括执行输入和输出功能的门，其输入和输出选择性地耦合到原始网表的网络，以及它们的否定。
-
-
-
-
-
-
-
-
-
搜索结果
196 条记录 (耗时 0.05 秒)
