METAL PLATING SYSTEM INCLUDING GAS BUBBLE REMOVAL UNIT
    22.
    发明申请
    METAL PLATING SYSTEM INCLUDING GAS BUBBLE REMOVAL UNIT 审中-公开
    金属镀层系统,包括气体排气单元

    公开(公告)号:US20160047058A1

    公开(公告)日:2016-02-18

    申请号:US14928088

    申请日:2015-10-30

    Abstract: An electroplating apparatus includes an anode configured to electrically communicate with an electrical voltage and an electrolyte solution. A cathode module includes a cathode that is configured to electrically communicate with a ground potential and the electrolyte solution. The cathode module further includes a wafer in electrical communication with the cathode. The wafer is configured to receive metal ions from the anode in response to current flowing through the anode via electrodeposition. The electroplating apparatus further includes at least one agitating device interposed between the wafer and the anode. The agitating device is configured to apply a force to gas bubbles adhering to a surface of the wafer facing the agitating device.

    Abstract translation: 电镀设备包括被配置为与电压和电解质溶液电连通的阳极。 阴极模块包括被配置为与地电位和电解质溶液电连通的阴极。 阴极模块还包括与阴极电连通的晶片。 晶片被配置为响应于电流通过电沉积而流过阳极而从阳极接收金属离子。 电镀装置还包括插入在晶片和阳极之间的至少一个搅拌装置。 搅拌装置构造成对粘附到面向搅拌装置的晶片表面的气泡施加力。

    Concurrently forming nFET and pFET gate dielectric layers
    23.
    发明授权
    Concurrently forming nFET and pFET gate dielectric layers 有权
    同时形成nFET和pFET栅极电介质层

    公开(公告)号:US09059315B2

    公开(公告)日:2015-06-16

    申请号:US13732455

    申请日:2013-01-02

    CPC classification number: H01L21/823857

    Abstract: Embodiments include methods of forming an nFET-tuned gate dielectric and a pFET-tuned gate dielectric. Methods may include forming a high-k layer above a substrate having a pFET region and an nFET region, forming a first sacrificial layer, a pFET work-function metal layer, and a second sacrificial layer above the first high-k layer in the pFET region, and an nFET work-function metal layer above the first high-k layer in the nFET region and above the second sacrificial layer in the pFET region. The first high-k layer then may be annealed to form an nFET gate dielectric layer in the nFET region and a pFET gate dielectric layer in the pFET region. The first high-k layer may be annealed in the presence of a nitrogen source to cause atoms from the nitrogen source to diffuse into the first high-k layer in the nFET region.

    Abstract translation: 实施例包括形成nFET调谐的栅极电介质和pFET调谐的栅极电介质的方法。 方法可以包括在pFET区域和nFET区域之上形成高k层,形成第一牺牲层,pFET功函数金属层和在pFET中的第一高k层上方的第二牺牲层 区域,以及在nFET区域中的第一高k层上方的nFET功函数金属层,并且在pFET区域中的第二牺牲层上方。 第一高k层然后可以退火以在nFET区域中形成nFET栅极介电层,并在pFET区域中形成pFET栅极电介质层。 第一高k层可以在存在氮源的情况下进行退火,以使来自氮源的原子扩散到nFET区域中的第一高k层。

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