公开(公告)号：US11710655B2

公开(公告)日：2023-07-25

申请号：US17505963

申请日：2021-10-20

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anthony K. Stamper ,  Henry L. Aldridge, Jr. ,  Johnatan A. Kantarovsky ,  Jeonghyun Hwang

IPC: H01L21/762 ,  H01L29/06 ,  H01L21/763 ,  H01L21/761

CPC classification number: H01L21/76224 ,  H01L21/761 ,  H01L21/763 ,  H01L29/0649

Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure, including a semiconductor-based isolation structure on a substrate. A shallow trench isolation (STI) structure may be positioned on the semiconductor-based isolation structure. An active semiconductor region is on the substrate and adjacent each of the semiconductor-based isolation structure and the STI structure. The active semiconductor region includes a doped semiconductor material. At least one device on the active semiconductor region may be horizontally distal to the STI structure.

公开(公告)号：US11569374B2

公开(公告)日：2023-01-31

申请号：US17109538

申请日：2020-12-02

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Siva P. Adusumilli ,  Mark Levy ,  Jeonghyun Hwang

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/16 ,  H01L29/04 ,  H01L27/088 ,  H01L29/66

Abstract: Structures including devices, such as transistors, integrated on a semiconductor substrate and methods of forming a structure including devices, such as transistors, integrated on a semiconductor substrate. A first transistor is formed in a first device region of a semiconductor substrate, and a second transistor is formed in a second device region of the semiconductor substrate. The second transistor includes a layer stack on the semiconductor substrate, and the layer stack includes a layer comprised of a III-V compound semiconductor material. A polycrystalline layer includes a section that is positioned in the semiconductor substrate beneath the first device region.

公开(公告)号：US11316019B2

公开(公告)日：2022-04-26

申请号：US16942734

申请日：2020-07-29

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Johnatan Avraham Kantarovsky ,  Rajendran Krishnasamy ,  Siva P. Adusumilli ,  Steven Bentley ,  Michael Joseph Zierak ,  Jeonghyun Hwang

IPC: H01L29/40 ,  H01L29/778 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate.

公开(公告)号：US11177158B2

公开(公告)日：2021-11-16

申请号：US16800011

申请日：2020-02-25

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anthony K. Stamper ,  Henry L. Aldridge, Jr. ,  Johnatan A. Kantarovsky ,  Jeonghyun Hwang

IPC: H01L21/762 ,  H01L29/06 ,  H01L21/763

Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure, including a semiconductor-based isolation structure on a substrate. A shallow trench isolation (STI) structure may be positioned on the semiconductor-based isolation structure. An active semiconductor region is on the substrate and adjacent each of the semiconductor-based isolation structure and the STI structure. The active semiconductor region includes a doped semiconductor material. At least one device on the active semiconductor region may be horizontally distal to the STI structure.

公开(公告)号：US20210265198A1

公开(公告)日：2021-08-26

申请号：US16800011

申请日：2020-02-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Henry L. Aldridge, JR. ,  Johnatan A. Kantarovsky ,  Jeonghyun Hwang

IPC: H01L21/762 ,  H01L21/763 ,  H01L29/06

Abstract: Embodiments of the disclosure provide an integrated circuit (IC) structure, including a semiconductor-based isolation structure on a substrate. A shallow trench isolation (STI) structure may be positioned on the semiconductor-based isolation structure. An active semiconductor region is on the substrate and adjacent each of the semiconductor-based isolation structure and the STI structure. The active semiconductor region includes a doped semiconductor material. At least one device on the active semiconductor region may be horizontally distal to the STI structure.