公开(公告)号：US11616127B2

公开(公告)日：2023-03-28

申请号：US17650854

申请日：2022-02-13

Applicant: GlobalFoundries U.S. Inc.

Inventor： Johnatan Avraham Kantarovsky ,  Rajendran Krishnasamy ,  Siva P. Adusumilli ,  Steven Bentley ,  Michael Joseph Zierak ,  Jeonghyun Hwang

IPC: H01L29/40 ,  H01L29/778 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L29/417

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate.

公开(公告)号：US20220029000A1

公开(公告)日：2022-01-27

申请号：US16934669

申请日：2020-07-21

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Siva P. Adusumilli ,  Vibhor Jain ,  Steven Bentley

IPC: H01L29/66 ,  H01L29/20

Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. A layer stack is formed on a semiconductor substrate comprised of a single-crystal semiconductor material. The layer stack includes a semiconductor layer comprised of a III-V compound semiconductor material. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer extends laterally beneath the layer stack.

公开(公告)号：US20240079405A1

公开(公告)日：2024-03-07

申请号：US17902463

申请日：2022-09-02

Applicant: GlobalFoundries U.S. Inc.

Inventor： Santosh SHARMA ,  Steven Bentley

IPC: H01L27/06 ,  H01L21/8252 ,  H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778 ,  H01L29/94

CPC classification number: H01L27/0605 ,  H01L21/8252 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/66181 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/94

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a high-electron-mobility transistor and methods of manufacture. The structure includes: at least one depletion mode gate on a conductive material over a semiconductor material; and at least one enhancement mode gate electrically connected to the at least one depletion mode gate and over the semiconductor material.

公开(公告)号：US11569170B2

公开(公告)日：2023-01-31

申请号：US17064602

申请日：2020-10-07

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. Adusumilli ,  Mark David Levy ,  Ramsey Hazbun ,  Alvin Joseph ,  Steven Bentley

IPC: H01L23/535 ,  H01L21/74 ,  H01L21/768 ,  H01L23/367 ,  H01L23/48 ,  H01L29/10 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/778 ,  H01L29/735

Abstract: A semiconductor device is provided, the semiconductor device comprising a substrate having merged cavities in the substrate. An active region is over the merged cavities in the substrate. A thermally conductive layer is in the merged cavities in the substrate, whereby the thermally conductive layer at least partially fills up the merged cavities in the substrate. A first contact pillar connects the thermally conductive layer in the merged cavities in the substrate with a metallization layer above the active region.

公开(公告)号：US11515397B2

公开(公告)日：2022-11-29

申请号：US16934669

申请日：2020-07-21

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. Stamper ,  Siva P. Adusumilli ,  Vibhor Jain ,  Steven Bentley

IPC: H01L29/66 ,  H01L29/20 ,  H01L29/778 ,  H01L29/06 ,  H01L21/763 ,  H01L21/8234 ,  H01L29/36

Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. A layer stack is formed on a semiconductor substrate comprised of a single-crystal semiconductor material. The layer stack includes a semiconductor layer comprised of a III-V compound semiconductor material. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer extends laterally beneath the layer stack.

公开(公告)号：US11316019B2

公开(公告)日：2022-04-26

申请号：US16942734

申请日：2020-07-29

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Johnatan Avraham Kantarovsky ,  Rajendran Krishnasamy ,  Siva P. Adusumilli ,  Steven Bentley ,  Michael Joseph Zierak ,  Jeonghyun Hwang

IPC: H01L29/40 ,  H01L29/778 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78

Abstract: The present disclosure relates generally to structures in semiconductor devices and methods of forming the same. More particularly, the present disclosure relates to semiconductor devices having field plates that are arranged symmetrically around a gate. The present disclosure provides a semiconductor device including an active region above a substrate, source and drain electrodes in contact with the active region, a gate above the active region and laterally between the source and drain electrodes, a first field plate between the source electrode and the gate, a second field plate between the drain electrode and the gate, in which the gate is spaced apart laterally and substantially equidistant from the first field plate and the second field plate.

公开(公告)号：US11101348B2

公开(公告)日：2021-08-24

申请号：US16044544

申请日：2018-07-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ruilong Xie ,  Julien Frougier ,  Nigel G. Cave ,  Steven R. Soss ,  Daniel Chanemougame ,  Steven Bentley ,  Rohit Galatage ,  Bum Ki Moon

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/02 ,  H01L21/8234 ,  H01L29/08 ,  H01L21/768 ,  H01L27/088 ,  B82Y40/00 ,  B82Y30/00

Abstract: Methods form devices by creating openings in sacrificial gates between nanosheet stacks (alternating layers of a first material and channel structures), forming spacers in the openings, and removing the sacrificial gates to leave the spacers. The first material is then removed from between the channel structures. A first work function metal is formed around and between the channel structures. Next, first stacks (of the stacks) are protected with a mask to leave second stacks (of the stacks) exposed. Then, the first work function metal is removed from the second stacks while the first stacks are protected by the mask and the spacers. Subsequently, a second work function metal is formed around and between the channel structures of the second stacks. A gate material is then formed over the first work function metal and the second work function metal.