公开(公告)号：US11362178B2

公开(公告)日：2022-06-14

申请号：US16676488

申请日：2019-11-07

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Jiehui Shu ,  Rinus Tek Po Lee ,  Baofu Zhu

IPC: H01L29/08 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/423 ,  H01L27/088

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to asymmetric source and drain structures and methods of manufacture. The structure includes: at least one gate structure; a straight spacer adjacent to the at least one gate structure; and an L-shaped spacer on a side of the at least one gate structure opposing the straight spacer, the L-shaped spacer extending a first diffusion region further away from the at least one gate structure than the straight spacer extends a second diffusion region on a second side away from the at least one gate structure.

公开(公告)号：US11177385B2

公开(公告)日：2021-11-16

申请号：US16781236

申请日：2020-02-04

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Sipeng Gu ,  Jiehui Shu ,  Baofu Zhu

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure extends over a channel region in a semiconductor body. The gate structure has a first side surface and a second side surface opposite the first side surface. A first source/drain region is positioned adjacent to the first side surface of the gate structure and a second source/drain region is positioned adjacent to the second side surface of the gate structure. The first source/drain region includes a first epitaxial semiconductor layer, and the second source/drain region includes a second epitaxial semiconductor layer. A first top surface of the first epitaxial semiconductor layer is positioned at a first distance from the channel region, a second top surface of the second epitaxial semiconductor layer is positioned at a second distance from the channel region, and the first distance is greater than the second distance.

公开(公告)号：US11171237B2

公开(公告)日：2021-11-09

申请号：US16386902

申请日：2019-04-17

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Yanping Shen ,  Halting Wang ,  Hui Zang ,  Jiehui Shu

IPC: H01L23/482 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/66 ,  H01L21/8234

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to middle of line gate structures and methods of manufacture. The structure includes: a plurality of adjacent gate structures; a bridged gate structure composed of a plurality of the adjacent gate structures; source and drain regions adjacent to the bridged gate structure and comprising source and drain metallization features; and contacts to the bridged gate structure and the source and drain metallization features.

公开(公告)号：US11145716B1

公开(公告)日：2021-10-12

申请号：US16877510

申请日：2020-05-19

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Rinus Tek Po Lee ,  Jiehui Shu

IPC: H01L21/02 ,  H01L21/3205 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/786

Abstract: A structure comprises a substrate and a first gate structure and a second gate structure in a dielectric layer over the substrate. The first and second gate structures having a width, the width of the first gate structure is shorter than the width of the second gate structure. The first gate structure comprises a first gate conductor layer and the second gate structure comprises a second gate conductor layer. The first gate conductor layer is made of a different metal from the second gate conductor layer.

公开(公告)号：US11127834B2

公开(公告)日：2021-09-21

申请号：US16599684

申请日：2019-10-11

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Jiehui Shu ,  Sipeng Gu ,  Halting Wang

IPC: H01L29/49 ,  H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L29/40

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to gate structures and methods of manufacture. The method includes: forming a first gate structure and a second gate structure with gate materials; etching the gate materials within the second gate structure to form a trench; and depositing a conductive material within the trench so that the second gate structure has a metal composition different than the first gate structure.

公开(公告)号：US20210217887A1

公开(公告)日：2021-07-15

申请号：US16739299

申请日：2020-01-10

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Jiehui Shu ,  Haiting Wang ,  Hong Yu

IPC: H01L29/78 ,  H01L27/088 ,  H01L21/762 ,  H01L29/66

Abstract: A transistor device that includes a single semiconductor structure having an outer perimeter and a vertical height, wherein the single semiconductor structure is at least partially defined by a trench formed in a semiconductor substrate and a first layer of material positioned on the bottom surface of the trench and around the outer perimeter of the single semiconductor structure. The device also includes a second layer of material positioned on the first layer of material and around the outer perimeter of the single semiconductor structure, a gap between the outer perimeter of the single semiconductor structure and both the first and second layers of material (when considered collectively) and an insulating sidewall spacer positioned in the gap, wherein the insulating sidewall spacer has a vertical height that is less than the vertical height of the single semiconductor structure.

公开(公告)号：US10971583B2

公开(公告)日：2021-04-06

申请号：US16188408

申请日：2018-11-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Hong Yu ,  Hui Zang ,  Jiehui Shu

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/033 ,  H01L21/8234 ,  H01L21/764 ,  H01L21/768

Abstract: A gate cut isolation including an air gap and an IC including the same are disclosed. A method of forming the gate cut isolation may include forming an opening in a dummy gate that extends over a plurality of spaced active regions, the opening positioned between and spaced from a pair of active regions. The opening is filled with a fill material, and the dummy gate is removed. A metal gate is formed in a space vacated by the dummy gate on each side of the fill material, and the fill material is removed to form a preliminary gate cut opening. A liner is deposited in the preliminary gate cut opening, creating a gate cut isolation opening, which is then sealed by depositing a sealing layer. The sealing layer closes an upper end of the gate cut isolation opening and forms the gate cut isolation including an air gap.

公开(公告)号：US10964599B2

公开(公告)日：2021-03-30

申请号：US16529162

申请日：2019-08-01

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Asli Sirman ,  Jiehui Shu ,  Chih-Chiang Chang ,  Huy Cao ,  Haigou Huang ,  Jinping Liu

IPC: H01L21/00 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/762 ,  H01L29/66 ,  H01L29/78

Abstract: Methods produce integrated circuit structures that include (among other components) fins extending from a first layer, source/drain structures on the fins, source/drain contacts on the source/drain structures, an insulator on the source/drain contacts defining trenches between the source/drain contacts, gate conductors in a lower portion of the trenches adjacent the fins, a first liner material lining a middle portion and an upper portion of the trenches, a fill material in the middle portion of the trenches, and a second material in the upper portion of the trenches. The first liner material is on the gate conductors in the trenches.

公开(公告)号：US11610965B2

公开(公告)日：2023-03-21

申请号：US17185236

申请日：2021-02-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Hong Yu ,  Hui Zang ,  Jiehui Shu

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/033 ,  H01L21/8234 ,  H01L21/764 ,  H01L21/768

Abstract: A gate cut isolation including an air gap and an IC including the same are disclosed. A method of forming the gate cut isolation may include forming an opening in a dummy gate that extends over a plurality of spaced active regions, the opening positioned between and spaced from a pair of active regions. The opening is filled with a fill material, and the dummy gate is removed. A metal gate is formed in a space vacated by the dummy gate on each side of the fill material, and the fill material is removed to form a preliminary gate cut opening. A liner is deposited in the preliminary gate cut opening, creating a gate cut isolation opening, which is then sealed by depositing a sealing layer. The sealing layer closes an upper end of the gate cut isolation opening and forms the gate cut isolation including an air gap.

公开(公告)号：US11563085B2

公开(公告)日：2023-01-24

申请号：US17243832

申请日：2021-04-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Jiehui Shu ,  Baofu Zhu ,  Haiting Wang ,  Sipeng Gu

IPC: H01L29/08 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/78

Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure is arranged over a channel region of a semiconductor body. A first source/drain region is coupled to a first portion of the semiconductor body, and a second source/drain region is located in a second portion the semiconductor body. The first source/drain region includes an epitaxial semiconductor layer containing a first concentration of a dopant. The second source/drain region contains a second concentration of the dopant. The channel region is positioned in the semiconductor body between the first source/drain region and the second source/drain region.