公开(公告)号：US20080243636A1

公开(公告)日：2008-10-02

申请号：US11691926

申请日：2007-03-27

Applicant: Gene A. Frantz

Inventor： Gene A. Frantz

IPC: G06F17/00

CPC classification number: G06Q30/02 ,  G06Q30/0601

Abstract: Embodiments of the invention to provide methods to provide on demand product placement to web based content. A method of in accordance with an embodiment of includes obtaining agreement between entities for placing a product in content. The products image or region of interest in the content is manipulated such that the product is emphasized; and content provider obtains payment for the content based activity of the content.

Abstract translation: 本发明的实施例提供了将按需产品放置到基于网络的内容的方法。 根据实施例的方法包括获得将产品置于内容中的实体之间的协议。 操作内容中的产品图像或感兴趣区域，使得产品被强调; 并且内容提供商获得对内容的基于内容的活动的支付。

公开(公告)号：US06904264B1

公开(公告)日：2005-06-07

申请号：US09713736

申请日：2000-11-15

Applicant: Gene A. Frantz

Inventor： Gene A. Frantz

IPC: H04H60/17 ,  H04H60/21 ,  H04H60/27 ,  H04H1/00

CPC classification number: H04H60/21 ,  H04H60/17 ,  H04H60/27 ,  H04H2201/183 ,  H04H2201/20 ,  H04H2201/30 ,  H04H2201/37 ,  H04H2201/50

Abstract: The user receives a digital radio transmission through a digital receiver and transmits a request to download selected content from this transmission to a content agent, an entity responsible for authorizing the authorized downloading of the digital content. If the content is not free of charge, the user also transmits sufficient information to allow for payment for the digital. The user then receives a transmission authorizing the downloading of the digital content from the content agent upon acceptance of the payment by the content agent. The user then downloads the content to a storage device which is coupled to the receiver.

Abstract translation: 用户通过数字接收机接收数字无线电传输，并将从该传输中下载所选内容的请求发送给负责授权下载数字内容的内容代理。 如果内容不是免费的，则用户还发送足够的信息以允许数字付款。 然后，用户在接受内容代理的支付时接收授权从内容代理下载数字内容的传输。 然后，用户将内容下载到耦合到接收器的存储设备。

公开(公告)号：US06662291B2

公开(公告)日：2003-12-09

申请号：US10190017

申请日：2002-07-05

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C800

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronous read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US06418078B2

公开(公告)日：2002-07-09

申请号：US09745892

申请日：2000-12-21

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C800

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronous read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US5680368A

公开(公告)日：1997-10-21

申请号：US473586

申请日：1995-06-07

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C7/10 ,  G11C8/02 ,  H04B7/185 ,  G11C8/00

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronious read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和提供地址存储器阵列（24）的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US5680358A

公开(公告)日：1997-10-21

申请号：US480636

申请日：1995-06-07

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John Victor Moravec ,  Jean-Pierre Dolait

IPC: G11C7/10 ,  G11C8/02 ,  H04B7/185 ,  G11C8/00

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronious read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36), which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含地址缓冲寄存器（36），其存储随机存取地址和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US5636176A

公开(公告)日：1997-06-03

申请号：US362289

申请日：1994-12-22

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John V. Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John V. Moravec ,  Jean-Pierre Dolait

IPC: G11C7/10 ,  G11C8/02 ,  H04B7/185 ,  G11C8/00

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disabled. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronious read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）被禁用。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US5587962A

公开(公告)日：1996-12-24

申请号：US483003

申请日：1995-06-07

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John V. Moravec ,  Jean-Pierre Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John V. Moravec ,  Jean-Pierre Dolait

IPC: G11C7/10 ,  H04B7/185 ,  G11C8/04

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory is disclosed. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronious read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 公开了具有特别适于允许存储器电路（14）用作视频帧存储器的特征的存储器电路（14）。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US5093807A

公开(公告)日：1992-03-03

申请号：US512611

申请日：1990-04-20

Applicant: Masashi Hashimoto ,  Gene A. Frantz ,  John V. Moravec ,  Jean P. Dolait

Inventor： Masashi Hashimoto ,  Gene A. Frantz ,  John V. Moravec ,  Jean P. Dolait

IPC: G11C7/10 ,  G11C8/02 ,  H04B7/185

CPC classification number: G09G5/391 ,  G11C7/103 ,  G11C7/1036 ,  G11C7/1072 ,  G11C7/1075 ,  H04B7/18502

Abstract: A memory circuit (14) having features specifically adapted to permit the memory circuit (14) to serve as a video frame memory. The memory circuit (14) contains a dynamic random access memory array (24) with buffers (18, 20) on input and output data ports (22) thereof to permit asynchronious read, write and refresh accesses to the memory array (24). The memory circuit (14) is accessed both serially and randomly. An address generator (28) contains an address buffer register (36) which stores a random access address and an address sequencer (40) which provides a stream of addresses to the memory array (24). An initial address for the stream of addresses is the random access address stored in the address buffer register (36).

Abstract translation: 一种存储电路（14），其具有特别适于允许存储电路（14）用作视频帧存储器的特征。 存储器电路（14）包含在其输入和输出数据端口（22）上具有缓冲器（18,20）的动态随机存取存储器阵列（24），以允许对存储器阵列（24）的异步读取，写入和刷新访问。 存储器电路（14）被串行和随机地访问。 地址生成器（28）包含存储随机存取地址的地址缓冲寄存器（36）和向存储器阵列（24）提供地址流的地址定序器（40）。 地址流的初始地址是存储在地址缓冲寄存器（36）中的随机存取地址。

公开(公告)号：US4624012A

公开(公告)日：1986-11-18

申请号：US375434

申请日：1982-05-06

Applicant: Kun-Shan Lin ,  Alva E. Henderson ,  Gene A. Frantz

Inventor： Kun-Shan Lin ,  Alva E. Henderson ,  Gene A. Frantz

IPC: G10L21/00 ,  G10L5/00

CPC classification number: G10L21/00

Abstract: Method and apparatus for converting voice characteristics of synthesized speech from a single applied source of synthesized speech in a manner obtaining modified voice characteristics pertaining to the apparent age and/or sex of the speaker. The apparatus is capable of altering the voice characteristics of synthesized speech to obtain modified voice sounds simulating child-like, teenage, adult, aged and sexual preference characteristics by control of vocal track parameters including pitch period, vocal tract model, and speech data rate. A source of synthesized speech having a predetermined pitch period, a predetermined vocal tract model, and a predetermined speech rate is separated into the respective speech parameters. The values of pitch, the speech data frame length, and the speech data rate are then varied in a preselected manner to modify the voice characteristics of the synthesized speech from the source thereof. Thereafter, the changed speech data parameters are re-combined into a modified synthesized speech data format having different voice characteristics with respect to the synthesized speech from the source, and an audio signal representative of human speech is generated from the modified synthesized speech data format from which audible synthesized speech may be generated.

Abstract translation: 从合成语音的单个应用源转换合成语音的语音特征的方法和装置，获得与演讲者的表观年龄和/或性别相关的修改的语音特征。 该装置能够通过控制包括音高周期，声道模型和语音数据速率在内的声道参数来改变合成语音的语音特征，从而获得模拟儿童，青少年，成人，年龄和性偏好特征的修改语音。 具有预定音调周期，预定声道模型和预定语音速率的合成语音源被分成各个语音参数。 然后，以预选的方式改变音调值，语音数据帧长度和语音数据速率，以从其源修改合成语音的语音特征。 此后，改变的语音数据参数被重新组合成相对于来自源的合成语音具有不同语音特征的修改的合成语音数据格式，并且从修改的合成语音数据格式生成代表人类语音的音频信号， 可以产生可听到的合成语音。