利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

36 条记录 (耗时 0.057 秒)

    Static dissipative elastomeric coating for electronic packaging components
    21.
    发明授权
    Static dissipative elastomeric coating for electronic packaging components 失效
    用于电子封装组件的静电耗散弹性体涂层

    公开(公告)号：US4875581A

    公开(公告)日：1989-10-24

    申请号：US713420

    申请日：1985-03-19

    申请人： Robert Ray ,  Robert A. Neal ,  John R. Jaran ,  Tim Parker

    发明人： Robert Ray ,  Robert A. Neal ,  John R. Jaran ,  Tim Parker

    IPC分类号： H01L23/60

    CPC分类号： H01L23/60 ,  H01L2924/0002 ,  Y10S428/922 ,  Y10S524/91

    摘要： The invention features a static dissipative elastomeric outer coating for an electronic package composite. The coating is characterized by its superior abrasion resistant and electrical properties. The coating chemically bonds with the conductive layer and has superior static dissipative qualities characterized by a surface resistivity in the range of between 10.sup.5 and 10.sup.11 ohms per square.

    摘要翻译： 本发明的特征在于用于电子封装复合材料的静电耗散弹性外涂层。 该涂层的特征在于其优异的耐磨性和电性能。 涂层与导电层化学键合并且具有优异的静电耗散性质，其特征在于表面电阻率在105和1011欧姆/平方的范围内。

    Automatically routing nets according to current density rules
    22.
    发明授权
    Automatically routing nets according to current density rules 有权
    根据当前密度规则自动布线网络

    公开(公告)号：US07530040B1

    公开(公告)日：2009-05-05

    申请号：US11383658

    申请日：2006-05-16

    申请人： Graham Balsdon ,  Jeremy Birch ,  Mark Williams ,  Mark Waller ,  Tim Parker ,  Fumiaki Sato

    发明人： Graham Balsdon ,  Jeremy Birch ,  Mark Williams ,  Mark Waller ,  Tim Parker ,  Fumiaki Sato

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5077

    摘要： A technique will automatically route interconnect of an integrated circuit while taking into consideration current density rules. In an implementation, the technique uses a shape-based approach where a grid is not used. Based on data input including current density and a frequency of each net, the technique will determine the current requirements for each net. In an implementation, the technique forms a Steiner tree for a net, and routs using the Steiner tree. The technique widens nets having greater current requirements; adjacent wiring may be pushed aside to create sufficient space for wider nets.

    摘要翻译： 一种技术将自动路由集成电路的互连，同时考虑电流密度规则。 在实现中，该技术使用基于形状的方法，其中不使用网格。 基于数据输入，包括电流密度和每个网络的频率，该技术将确定每个网络的当前要求。 在实现中，该技术为网络形成Steiner树，并使用Steiner树进行路由。 该技术扩大了具有更大电流要求的网络; 可以将相邻的布线推到一边以产生用于更宽的网的足够的空间。

    Device for component processing
    24.
    发明授权
    Device for component processing 失效
    组件处理设备

    公开(公告)号：US5361914A

    公开(公告)日：1994-11-08

    申请号：US131836

    申请日：1993-10-05

    申请人： Tim Parker

    发明人： Tim Parker

    IPC分类号： B08B3/12 ,  B08B11/02 ,  H01L21/00 ,  A47F5/00

    CPC分类号： H01L21/67057 ,  B08B11/02 ,  B08B3/12

    摘要： Disclosed is an apparatus and method for processing electronic components in an ultrasonic bath. The apparatus includes a tray, which has a number of nests geometrically configured for the admission of the components. In one embodiment the tray is made of a polypropylene core which includes conductive carbon and glass beads as a filler. Plated over the core is a metallic sheath, which is actually formed of three layers of metal. The metal encapsulation of the core serves to appreciably reduce the amount of contaminants released by the tray during component processing. Additionally, the metallic sheath prevents static electricity from building up and damaging the components during processing, and provides added structural integrity to the polypropylene core at process temperatures which exceed the softening temperature of the core.

    摘要翻译： 公开了一种用于在超声波浴中处理电子部件的装置和方法。 该装置包括托盘，该托盘具有几个几何形状地配置用于容纳部件的巢。 在一个实施例中，托盘由聚丙烯芯制成，其包括作为填料的导电碳和玻璃珠。 在芯上镀覆的是金属护套，其实际上由三层金属制成。 芯的金属封装用于明显地减少在部件加工期间由托盘释放的污染物的量。 此外，金属护套防止静电在加工过程中增加和损坏组件，并且在超过芯的软化温度的工艺温度下为聚丙烯芯提供附加的结构完整性。

    Localized microwave radiation heating
    26.
    发明授权
    Localized microwave radiation heating 失效
    局部微波辐射加热

    公开(公告)号：US4876423A

    公开(公告)日：1989-10-24

    申请号：US304734

    申请日：1989-01-31

    申请人： Laurence E. Tighe ,  Tim Parker

    发明人： Laurence E. Tighe ,  Tim Parker

    IPC分类号： B65D81/34

    CPC分类号： B65D81/3446 ,  B65D2581/3443 ,  B65D2581/3447 ,  B65D2581/3448 ,  B65D2581/3451 ,  B65D2581/3464 ,  B65D2581/3472 ,  B65D2581/3474 ,  B65D2581/3477 ,  B65D2581/3479 ,  B65D2581/3483 ,  B65D2581/3494 ,  Y10S99/14

    摘要： A medium formed by a mixture of polymeric binder with conductive and semiconductive particles that can be coated or printed on a substrate to convert electromagnetic radiation to heat without arcing and produce increase heating of foods. Conversion efficiency can be controlled by the choice, thickness, pattern and amount of materials used in the medium. The medium can be used repeatedly without burn out. The conductive particles are typically aluminum, copper, zinc and nickel and the semiconductive particles are typically carbon, titanium carbide and zinc oxide.

    摘要翻译： 由聚合物粘合剂与导电和半导体颗粒的混合物形成的介质，其可以被涂覆或印刷在基底上，以将电磁辐射转换成热而不产生电弧并产生食物的加热。 转换效率可以通过介质中使用的材料的选择，厚度，图案和数量来控制。 介质可以反复使用而不会烧坏。 导电颗粒通常为铝，铜，锌和镍，半导体颗粒通常为碳，碳化钛和氧化锌。

    Method and apparatus for electrical stimulation of meat
    27.
    发明授权
    Method and apparatus for electrical stimulation of meat 有权
    电刺激肉类的方法和装置

    公开(公告)号：US08376815B1

    公开(公告)日：2013-02-19

    申请号：US12433526

    申请日：2009-04-30

    申请人： Tim Parker

    发明人： Tim Parker

    IPC分类号： A22C17/00

    CPC分类号： A22C9/002

    摘要： A method of tenderizing meat on a poultry carcass includes defeathering the poultry carcass, and subsequently applying a pulsed electrical voltage across the poultry carcass. The electrical voltage can be sufficient to impart an electrical current across the poultry carcass that is at least about 350 milliamps. An apparatus for tenderizing meat on a poultry carcass is also discussed.

    摘要翻译： 一种在家禽屠体上对肉类进行嫩化的方法包括取消家禽屠体，并随后在家禽屠体上施加脉冲电压。 电压可以足以使通过家禽屠体的电流至少为约350毫安。 还讨论了一种用于在家禽屠体上嫩肉的设备。

    Automatic integrated circuit routing using spines
    29.
    发明授权
    Automatic integrated circuit routing using spines 有权
    使用脊柱自动集成电路布线

    公开(公告)号：US08099700B1

    公开(公告)日：2012-01-17

    申请号：US11838726

    申请日：2007-08-14

    申请人： Mark Waller ,  Tim Parker ,  Mark Williams ,  Jeremy Birch ,  Graham Balsdon ,  Fumiako Sato

    发明人： Mark Waller ,  Tim Parker ,  Mark Williams ,  Jeremy Birch ,  Graham Balsdon ,  Fumiako Sato

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5077

    摘要： A method and technique of routing interconnects of an integrated circuit providing improved routing quality. In an embodiment of the invention, the technique provides linear spine interconnect routing. In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by large distances in a first direction and small distances in a second direction, or a spine or channel region. A route area is defined within the spine region. In one embodiment, obstacles in the route area are identified and corresponding forbidden areas are demarcated. The linear spine interconnect is routed in the first direction within the route area while avoiding the forbidden areas. Pins are connected to the spine interconnect by stitching interconnects. Stitching interconnects are generally routed in the second direction.

    摘要翻译： 提供提供改进的路由质量的集成电路的互连路由的方法和技术。 在本发明的一个实施例中，该技术提供线性脊柱互连路由。 在诸如DRAM和SRAM存储器设计的存储器阵列块中，连接的引脚通常在第一方向上分开大距离，在第二方向或脊柱或通道区域上分开小距离。 在脊椎区域内定义路线区域。 在一个实施例中，识别路线区域中的障碍物并且划定对应的禁止区域。 线性脊线互连在路线区域内沿第一方向路由，同时避免禁止区域。 引脚通过缝合互连连接到脊柱互连。 缝合互连通常沿第二方向布线。