公开(公告)号：US09355889B2

公开(公告)日：2016-05-31

申请号：US14673517

申请日：2015-03-30

Applicant: IMEC VZW

Inventor： Niamh Waldron

IPC: H01L21/762 ,  H01L29/16 ,  H01L29/161 ,  H01L29/201 ,  H01L29/06 ,  H01L29/34 ,  H01L21/84 ,  C12N15/82

CPC classification number: H01L21/76251 ,  C12N15/8201 ,  C12N15/8241 ,  C12N15/8261 ,  H01L21/76264 ,  H01L21/845 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/161 ,  H01L29/201 ,  H01L29/34 ,  Y02A40/146

Abstract: The disclosed technology generally relates to semiconductor-on-insulator (SOI) devices and more particularly to SOI devices having a channel region comprising a Group III-V or a Group IV semiconductor material, and also relates to methods of fabricating the same. In one aspect, a method comprises providing a pre-patterned donor wafer, providing a handling wafer and bonding the pre-patterned donor wafer to the handling wafer by contacting the first oxide layer to the handling wafer. Providing a pre-patterned donor wafer comprises providing a donor substrate comprising a first semiconductor material, forming shallow trench isolation (STI) regions in the donor substrate, and forming fins in the donor substrate in between the STI regions, where each fin comprises a Group III-V or Group IV semiconductor material that is different from the first semiconducting material and laterally extends in a direction parallel to a major surface of the donor substrate and between the STI regions. Providing the pre-patterned donor wafer additionally includes providing a first oxide layer overlying the STI regions and the fins. After bonding the donor wafer to the handling wafer, at least part of the first semiconducting material of the pre-patterned donor wafer is removed and the STI regions and the fins are thinned thereby forming channel regions comprising the Group III-V or Group IV semiconductor material.

Abstract translation: 所公开的技术通常涉及绝缘体上半导体（SOI）器件，更具体地涉及具有包含III-V族或IV族半导体材料的沟道区的SOI器件，并且还涉及其制造方法。 在一个方面，一种方法包括提供预先构图的施主晶片，提供处理晶片，并通过使第一氧化物层与处理晶片接触来将预构图的施主晶片连接到处理晶片。 提供预构图的施主晶片包括提供包括第一半导体材料的施主衬底，在施主衬底中形成浅沟槽隔离（STI）区域，以及在STI区域之间在施主衬底中形成鳍，其中每个鳍包括组 III-V或IV族半导体材料，其不同于第一半导体材料并且在平行于施主衬底的主表面和STI区域的主表面的方向上横向延伸。 提供预构图施主晶片另外包括提供覆盖STI区域和鳍片的第一氧化物层。 在将施主晶片结合到处理晶片之后，去除预构图施主晶片的至少一部分第一半导体材料，并且使STI区域和鳍片变薄从而形成包括III-V族或IV族半导体的沟道区 材料。