公开(公告)号：US11768964B2

公开(公告)日：2023-09-26

申请号：US17679009

申请日：2022-02-23

Applicant: Intel Corporation

Inventor： Manoj R. Sastry ,  Alpa Narendra Trivedi ,  Men Long

IPC: G06F21/72 ,  G09C1/00 ,  G06F21/85 ,  H04L9/06 ,  H04L9/08

CPC classification number: G06F21/72 ,  G06F21/85 ,  G09C1/00 ,  H04L9/0643 ,  H04L9/0897 ,  G06F2207/7219 ,  G06F2211/008 ,  G06F2213/0038 ,  H04L2209/76

Abstract: Systems and techniques for a System-on-a-Chip (SoC) security plugin are described herein. A component message may be received at an interconnect endpoint from an SoC component. The interconnect endpoint may pass the component message to a security component via a security interlink. The security component may secure the component message, using a cryptographic engine, to create a secured message. The secured message is delivered back to the interconnect endpoint via the security interlink and transmitted across the interconnect by the interconnect endpoint.

公开(公告)号：US20230018402A1

公开(公告)日：2023-01-19

申请号：US17865089

申请日：2022-07-14

Applicant: Intel Corporation

Inventor： Xiruo Liu ,  Liuyang Yang ,  Leonardo Gomes Baltar ,  Moreno Ambrosin ,  Manoj R. Sastry

IPC: H04W12/00 ,  H04W72/04 ,  H04W4/80 ,  H04L9/32 ,  H04W4/40 ,  H04W12/069 ,  H04W12/106 ,  H04W12/64

Abstract: The present disclosure describe methods, apparatuses, storage media, and systems for a device disposed at an edge of a vehicular communication network or vehicles within a coverage area of the device. The device is to generate a list of vehicle security data to be distributed to vehicles currently within a coverage area of the device, based at least in part on a context related to the vehicles. The device is further to announce, on a control channel communicatively coupling the device and the vehicles, that the list of vehicle security data are available and a service channel to receive the list of vehicle security data. The list of vehicle security data are to be provided to the vehicles via the service channel. Other embodiments may be described and claimed.

公开(公告)号：US11201878B2

公开(公告)日：2021-12-14

申请号：US16402535

申请日：2019-05-03

Applicant: Intel Corporation

Inventor： Marcio Rogerio Juliato ,  Shabbir Ahmed ,  Santosh Ghosh ,  Christopher Gutierrez ,  Manoj R. Sastry

IPC: H04L29/06 ,  H04L12/40

Abstract: Various systems and methods for bus-off attack detection are described herein. An electronic device for bus-off attack detection and prevention includes bus-off prevention circuitry coupled to a protected node on a bus, the bus-off prevention circuitry to: detect a transmitted message from the protected node to the bus; detect a bit mismatch of the transmitted message on the bus; suspend further transmissions from the protected node while the bus is analyzed; determine whether the bit mismatch represents a bus fault or an active attack against the protected node; and signal the protected node indicating whether a fault has occurred.

公开(公告)号：US20210126786A1

公开(公告)日：2021-04-29

申请号：US17144216

申请日：2021-01-08

Applicant: Intel Corporation

Inventor： Santosh Ghosh ,  Andrew H. Reinders ,  Sudhir K. Satpathy ,  Manoj R. Sastry

IPC: H04L9/30 ,  G06F7/72 ,  G06F7/544 ,  G06F7/00

Abstract: In one embodiment, an apparatus includes a hardware accelerator to execute cryptography operations including a Rivest Shamir Adleman (RSA) operation and an elliptic curve cryptography (ECC) operation. The hardware accelerator may include a multiplier circuit comprising a parallel combinatorial multiplier, and an ECC circuit coupled to the multiplier circuit to execute the ECC operation. The ECC circuit may compute a prime field multiplication using the multiplier circuit and reduce a result of the prime field multiplication in a plurality of addition and subtraction operations for a first type of prime modulus. The hardware accelerator may execute the RSA operation using the multiplier circuit. Other embodiments are described and claimed.

公开(公告)号：US10671744B2

公开(公告)日：2020-06-02

申请号：US15190396

申请日：2016-06-23

Applicant: INTEL CORPORATION

Inventor： Li Zhao ,  Manoj R. Sastry ,  Arnab Raha

IPC: G06F21/62

Abstract: Lightweight trusted execution technologies for internet-of-things devices are described. In response to a memory request at a page unit from an application executing in a current domain, the page unit is to map a current virtual address (VA) to a current physical address (PA). The policy enforcement logic (PEL) reads, from a secure domain cache (SDC), a domain value (DID) and a VA value that correspond to the current PA. The PEL grants access when the current domain and the DID correspond to the unprotected region or the current domain and the DID correspond to the secure domain region, the current domain is equal to the DID, and the current VA is equal to the VA value. The PEL grants data access and denies code access when the current domain corresponds to the secure domain region and the DID corresponds to the unprotected region.

公开(公告)号：US20190044912A1

公开(公告)日：2019-02-07

申请号：US15942031

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Liuyang Lily Yang ,  Huaxin Li ,  Li Zhao ,  Marcio Juliato ,  Shabbir Ahmed ,  Manoj R. Sastry

IPC: H04L29/06 ,  G06F9/455

Abstract: There is disclosed in one example a computing apparatus, including: a hardware platform; a network interface to communicatively couple to a bus lacking native support for authentication; and an anomaly detection engine to operate on the hardware platform and configured to: receive a first data stream across a first time; symbolize and approximate the first data stream, including computing a first window sum; receive a second data stream across a second time substantially equal in length to the first time, the second data stream including data across the plurality of dimensions from the first data stream; symbolize and approximate the second data stream, including computing a second window sum; compute a difference between the first window sum and the second window sum; determine that difference exceeds a threshold and that the correlation across the plurality of dimensions is broken; and flag a potential anomaly.

公开(公告)号：US20190007219A1

公开(公告)日：2019-01-03

申请号：US15637737

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Santosh Ghosh ,  Manoj R. Sastry

IPC: H04L9/32 ,  H04L9/30

Abstract: Technologies for elliptic curve cryptography (ECC) include a computing device having an ECC engine that reads one or more parameters from a data port. The ECC engine performs operations using the parameters, such as an Elliptic Curve Digital Signature Algorithm (ECDSA). The ECDSA may be performed in a protected mode, in which the ECC engine will ignore inputs. The ECC engine may perform the ECDSA in a fixed amount of time in order to protect against timing side-channel attacks. The ECC engine may perform the ECDSA by consuming a uniform amount of power in order to protect against power side-channel attacks. The ECC engine may perform the ECDSA by emitting a uniform amount of electromagnetic radiation in order to protect against EM side-channel attacks. The ECC engine may perform the ECDSA verify with 384-bit output in order to protect against fault injection attacks.

公开(公告)号：US20180091550A1

公开(公告)日：2018-03-29

申请号：US15450650

申请日：2017-03-06

Applicant: Intel Corporation

Inventor： Kyong-Tak Cho ,  Li Zhao ,  Manoj R. Sastry

IPC: H04L29/06 ,  H04L12/40 ,  H04L5/00 ,  G01R19/04 ,  G01R19/165 ,  B60R16/023

Abstract: One embodiment provides an electronic control unit (ECU) for a vehicle. The ECU includes transceiver circuitry, voltage measurement circuitry and feature set circuitry. The transceiver circuitry is to at least one of send and/or receive a message. The voltage measurement circuitry is to determine at least one of a high bus line voltage (VCANH) value and/or a low bus line voltage (VCANL) value, for each zero bit of at least one zero bit of a received message. The received the message includes a plurality of bits. The feature set circuitry is to determine a value of at least one feature of a feature set based, at least in part, on at least one of a high acknowledge (ACK) threshold voltage (VthH) and/or a low ACK threshold voltage (VthL). The feature set includes at least one of an operating most frequently measured VCANH value (VfreqH2) of a number of VCANH values and/or an operating most frequently measured VCANL value (VfreqL2) of a number of VCANL values.

公开(公告)号：US20170180131A1

公开(公告)日：2017-06-22

申请号：US14971370

申请日：2015-12-16

Applicant: Intel Corporation

Inventor： Santosh Ghosh ,  Manoj R. Sastry ,  Solmaz Ghaznavi ,  Julien Carreno ,  Padraig J. Kearney

IPC: H04L9/32 ,  H04L9/06 ,  H04L29/06

CPC classification number: H04L9/3239 ,  G06F21/75 ,  G06F21/85 ,  G09C1/00 ,  H04L9/0643 ,  H04L63/061 ,  H04L63/123 ,  H04L2209/26

Abstract: System and techniques for secure unlock to access debug hardware are described herein. A cryptographic key may be received at a hardware debug access port of a device. A digest may be computed from the cryptographic key at an unlock unit of the device. A fuse value may be received from a non-volatile read-only storage on the device. The digest and the fuse value may be compared to determine whether they are the same. A pass-fail pulse may be provided that indicates the result of the comparing.

公开(公告)号：US20170093822A1

公开(公告)日：2017-03-30

申请号：US14865147

申请日：2015-09-25

Applicant: Intel Corporation

Inventor： Christopher N. Gutierrez ,  Jianqing Zhang ,  Manoj R. Sastry ,  Anand S. Konanur

IPC: H04L29/06 ,  H04W4/00 ,  H04W12/04

CPC classification number: H04L63/061 ,  H04B13/005 ,  H04W4/80 ,  H04W12/04

Abstract: In a method for enabling devices to communicate securely, a first device dynamically generates a human body nonce (HBN) and then sends that HBN to a second device via a human body communication conduit (HBCC). After sending the HBN from the first device to the second device, the first device uses the HBN to establish security for an over-the-air (OTA) communication session between the first device and the second device. For instance, the first device may derive a key, based at least in part on the HBN, and the first device may use the key to encrypt communications to be sent OTA between the first device and the second device. Other embodiments are described and claimed.