公开(公告)号：US11297163B2

公开(公告)日：2022-04-05

申请号：US16973856

申请日：2019-01-17

Applicant: INTEL CORPORATION

Inventor： Shoumeng Yan ,  Xiao Dong Lin ,  Yao Zu Dong ,  Zhen Zhou ,  Bin Yang

IPC: H04L67/00 ,  H04L67/04 ,  H04L67/50

Abstract: Method, systems and apparatuses may provide for technology that divides an application into a plurality of portions that are each associated with one or more functions of the application and determine a plurality of transition probabilities between the plurality of portions. Some technology may also receive at least a first portion of the plurality of portions, and receive a relation file indicating the plurality of transition probabilities between the plurality of portions.

公开(公告)号：US20210064333A1

公开(公告)日：2021-03-04

申请号：US17020531

申请日：2020-09-14

Applicant: Intel Corporation

Inventor： Shoumeng Yan ,  Yuan Wu ,  Dahai Kou

IPC: G06F3/16

Abstract: Technologies for framework-level audio device virtualization include a computing device that executes multiple application framework instances. The computing device monitors for an application framework instance switch and, in response to an application framework instance switch, determines whether the current application framework instance is in the foreground. If in the foreground, the computing device selects a physical audio output device. The computing device may output audio data associated with the current application framework instance using a kernel audio driver associated with the physical audio output device. If not in the foreground, the computing device selects a null audio output device using a null audio hardware abstraction layer (HAL). The null audio HAL may sleep for the duration of audio data associated with the current application framework instance. The null audio HAL may be an operating-system- and device-independent shared library of the computing device. Other embodiments are described and claimed.

公开(公告)号：US10255093B2

公开(公告)日：2019-04-09

申请号：US15026860

申请日：2013-12-17

Applicant: INTEL CORPORATION

Inventor： Shoumeng Yan

IPC: G06F9/455 ,  G06F9/52 ,  G06F9/46 ,  G06F9/50 ,  G06F11/32

Abstract: Various embodiments are generally directed to providing virtualization using relatively minimal processing and storage resources to enable concurrent isolated execution of multiple application routines in which one of the application routines is made visible at a time. An apparatus to virtualize an operating system includes a processor component, a visibility checker for execution by the processor component to make a visibility check call to a kernel routine to request an indication of whether an instance of a framework routine that comprises the visibility checker is visible, and resource access code of the instance for execution by the processor component to perform a resource access operation to access a hardware component based on the indication and on receipt of an application programming interface (API) call from an application routine that specifies an API function to access the hardware component. Other embodiments are described and claimed.

公开(公告)号：US09710396B2

公开(公告)日：2017-07-18

申请号：US14503596

申请日：2014-10-01

Applicant: Intel Corporation

Inventor： Ying Gao ,  Hu Chen ,  Shoumeng Yan ,  Xiaocheng Zhou ,  Sai Luo ,  Bratin Saha

IPC: G06F12/02 ,  G06F12/109 ,  G06F9/46 ,  G06F9/54 ,  G06F15/167 ,  G06T1/20

CPC classification number: G06F12/109 ,  G06F9/466 ,  G06F9/544 ,  G06F15/167 ,  G06F2212/656 ,  G06F2212/657 ,  G06T1/20

Abstract: A computer system may comprise a computer platform and input-output devices. The computer platform may include a plurality of heterogeneous processors comprising a central processing unit (CPU) and a graphics processing unit (GPU) and a shared virtual memory supported by a physical private memory space of at least one heterogeneous processor or a physical shared memory shared by the heterogeneous processor. The CPU (producer) may create shared multi-version data and store such shared multi-version data in the physical private memory space or the physical shared memory. The GPU (consumer) may acquire or access the shared multi-version data.

公开(公告)号：US09588826B2

公开(公告)日：2017-03-07

申请号：US14566654

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： Hu Chen ,  Ying Gao ,  Xiaocheng Zhou ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

IPC: G06F9/54 ,  G06F12/02 ,  G06F12/08 ,  G06F12/10 ,  G06T1/20 ,  G06T1/60

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

Abstract translation: 本发明的实施例提供了一种用于CPU-GPU平台的编程模型。 特别地，本发明的实施例为集成和分立设备提供统一的编程模型。 该模型还适用于多个GPU卡和混合GPU系统（分立和集成）。 这允许软件供应商编写单个应用程序堆栈并将其定位到所有不同的平台。 另外，本发明的实施例提供了CPU和GPU之间的共享存储器模型。 而不是共享整个虚拟地址空间，只需要共享虚拟地址空间的一部分。 这允许在离散和集成设置中有效实现。

公开(公告)号：US20150123978A1

公开(公告)日：2015-05-07

申请号：US14566654

申请日：2014-12-10

Applicant: Intel Corporation

Inventor： Hu Chen ,  Ying Gao ,  Xiaocheng Zhou ,  Shoumeng Yan ,  Peinan Zhang ,  Mohan Rajagopalan ,  Jesse Fang ,  Avi Mendelson ,  Bratin Saha

IPC: G06F9/54 ,  G06T1/20 ,  G06F12/08 ,  G06T1/60

CPC classification number: G06F9/544 ,  G06F12/0815 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1063 ,  G06F12/1072 ,  G06F12/1081 ,  G06F12/109 ,  G06F2212/161 ,  G06F2212/622 ,  G06F2212/656 ,  G06F2212/657 ,  G06F2212/682 ,  G06T1/20 ,  G06T1/60

Abstract: Embodiments of the invention provide a programming model for CPU-GPU platforms. In particular, embodiments of the invention provide a uniform programming model for both integrated and discrete devices. The model also works uniformly for multiple GPU cards and hybrid GPU systems (discrete and integrated). This allows software vendors to write a single application stack and target it to all the different platforms. Additionally, embodiments of the invention provide a shared memory model between the CPU and GPU. Instead of sharing the entire virtual address space, only a part of the virtual address space needs to be shared. This allows efficient implementation in both discrete and integrated settings.

Abstract translation: 本发明的实施例提供了一种用于CPU-GPU平台的编程模型。 特别地，本发明的实施例为集成和分立设备提供统一的编程模型。 该模型还适用于多个GPU卡和混合GPU系统（分立和集成）。 这允许软件供应商编写单个应用程序堆栈并将其定位到所有不同的平台。 另外，本发明的实施例提供了CPU和GPU之间的共享存储器模型。 而不是共享整个虚拟地址空间，只需要共享虚拟地址空间的一部分。 这允许在离散和集成设置中有效实现。