FILTERING HIDDEN MATRIX TRAINING DNN

    公开(公告)号:US20220207344A1

    公开(公告)日:2022-06-30

    申请号:US17134377

    申请日:2020-12-26

    Inventor: Tayfun Gokmen

    Abstract: In one aspect, a method of training a DNN includes transmitting an input vector x through a weight matrix W and reading a resulting output vector y, transmitting an error signal δ, transmitting the input vector x with the error signal δ through conductive row wires of a matrix A, and transmitting an input vector ei and reading a resulting output vector y′ as current output. The training also includes updating a hidden matrix H comprising an H value for RPU devices by iteratively adding the output vector y′ multiplied by the transpose of the input vector ei to each H value. The training also includes, when an H value reaches a threshold value, transmitting the input vector ei as a voltage pulse through the conductive column wires of the matrix W simultaneously with sign information of the H values that reached a threshold value as voltage pulses through the conductive row wires matrix W.

    MATRIX SKETCHING USING ANALOG CROSSBAR ARCHITECTURES

    公开(公告)号:US20210357540A1

    公开(公告)日:2021-11-18

    申请号:US16874819

    申请日:2020-05-15

    Abstract: A computer-implemented method is presented for performing matrix sketching by employing an analog crossbar architecture. The method includes low rank updating a first matrix for a first period of time, copying the first matrix into a dynamic correction computing device, switching to a second matrix to low rank update the second matrix for a second period of time, as the second matrix is low rank updated, feeding the first matrix with first stochastic pulses to reset the first matrix back to a first matrix symmetry point, copying the second matrix into the dynamic correction computing device, switching back to the first matrix to low rank update the first matrix for a third period of time, and as the first matrix is low rank updated, feeding the second matrix with second stochastic pulses to reset the second matrix back to a second matrix symmetry point.

    Killing asymmetric resistive processing units for neural network training

    公开(公告)号:US10956815B2

    公开(公告)日:2021-03-23

    申请号:US15609691

    申请日:2017-05-31

    Inventor: Tayfun Gokmen

    Abstract: Technical solutions are described for improving efficiency of training a resistive processing unit (RPU) array using a neural network training methodology. An example method includes reducing asymmetric RPUs from the RPU array by determining an asymmetric value of an RPU from the RPU array, and burning the RPU in response to the asymmetry value being above a predetermined threshold. The RPU can be burned by causing an electric voltage across the RPU to be above a predetermined limit. The method further includes initiating the training methodology for the RPU array after the asymmetric RPUs from the RPU array are reduced.

    Computer architecture with resistive processing units

    公开(公告)号:US10901939B2

    公开(公告)日:2021-01-26

    申请号:US14928970

    申请日:2015-10-30

    Inventor: Tayfun Gokmen

    Abstract: A processor includes an array of resistive processing units connected between row and column lines with a resistive element. A first single instruction, multiple data processing unit (SIMD) is connected to the row lines. A second SIMD is connected to the column lines. A first instruction issuer is connected to the first SIMD to issue instructions to the first SIMD, and a second instruction issuer is connected to the second SIMD to issue instructions to the second SIMD such that the processor is programmable and configurable for specific operations depending on an issued instruction set.

    RESISTIVE PROCESSING UNIT WITH MULTIPLE WEIGHT READERS

    公开(公告)号:US20190325291A1

    公开(公告)日:2019-10-24

    申请号:US15958322

    申请日:2018-04-20

    Abstract: Embodiments of the present invention include a crossbar array that includes a resistive processing unit (RPU) device at each crosspoint in the crossbar array. The RPU device includes a single weight storage element, and multiple weight reader elements. A first weight reader element is coupled with a first row wire to compute a first matrix product value using a first value and a stored value, the first value being transmitted via the first row wire and the stored value being stored in the single weight storage element. A second weight reader element is coupled with a second row wire to compute a second matrix product value of a second value and said stored value, the second value being transmitted via the second row wire.

    RESISTIVE PROCESSING UNIT ARCHITECTURE WITH SEPARATE WEIGHT UPDATE AND INFERENCE CIRCUITRY

    公开(公告)号:US20190318239A1

    公开(公告)日:2019-10-17

    申请号:US15954170

    申请日:2018-04-16

    Abstract: Systems and methods are provided to perform weight update operations in a resistive processing unit (RPU) system to update weight values of RPU devices comprising tunable resistive device. A weight update operation for a given RPU device includes maintaining a weight update accumulation value for the RPU device, adjusting the weight update accumulation value by one unit update value in response to a detected coincidence of stochastic bits streams of input vectors applied on an update row and update column control lines connected to the RPU device, generating a weight update control signal in response to the accumulated weight value reaching a predefined threshold value, and adjusting a conductance level of the tunable resistive device by one unit conductance value in response to the weight update control signal, wherein the one unit conductance value corresponds to one unit weight value of the RPU device.

    Noise and bound management for RPU array

    公开(公告)号:US10325007B2

    公开(公告)日:2019-06-18

    申请号:US15479561

    申请日:2017-04-05

    Abstract: A method, computer program product, and circuit are provided for noise and bound management for a Resistive Processing Unit (RN) array having an op-amp. The method includes reducing the noise in an output signal from the RPU array by using a largest value, in a sigma vector having a plurality of values, as a representation for a window for an input signal to the RPU array. The input signal to the RPU array is formed from the plurality of values. The method further includes sensing saturation at an output of the op-amp. The method also includes managing the bound to eliminate the saturation by reducing the plurality of values from which the input sign to the RPU is formed.

Patent Agency Ranking